Lines Matching +full:0 +full:xee000000
18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
70 #size-cells = <0>;
72 a53_0: cpu@0 {
74 reg = <0>;
98 L2_CA53: cache-controller-0 {
108 CPU_SLEEP_0: cpu-sleep-0 {
110 arm,psci-suspend-param = <0x0010000>;
121 #clock-cells = <0>;
123 clock-frequency = <0>;
129 #clock-cells = <0>;
130 clock-frequency = <0>;
148 #clock-cells = <0>;
149 clock-frequency = <0>;
162 reg = <0 0xe6020000 0 0x0c>;
173 reg = <0 0xe6050000 0 0x50>;
177 gpio-ranges = <&pfc 0 0 18>;
188 reg = <0 0xe6051000 0 0x50>;
192 gpio-ranges = <&pfc 0 32 23>;
203 reg = <0 0xe6052000 0 0x50>;
207 gpio-ranges = <&pfc 0 64 26>;
218 reg = <0 0xe6053000 0 0x50>;
222 gpio-ranges = <&pfc 0 96 16>;
233 reg = <0 0xe6054000 0 0x50>;
237 gpio-ranges = <&pfc 0 128 11>;
248 reg = <0 0xe6055000 0 0x50>;
252 gpio-ranges = <&pfc 0 160 20>;
263 reg = <0 0xe6055400 0 0x50>;
267 gpio-ranges = <&pfc 0 192 18>;
277 reg = <0 0xe6060000 0 0x508>;
282 #size-cells = <0>;
286 reg = <0 0xe60b0000 0 0x425>;
291 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
299 reg = <0 0xe60f0000 0 0x1004>;
312 reg = <0 0xe6130000 0 0x1004>;
331 reg = <0 0xe6140000 0 0x1004>;
350 reg = <0 0xe6148000 0 0x1004>;
368 reg = <0 0xe6150000 0 0x1000>;
372 #power-domain-cells = <0>;
378 reg = <0 0xe6160000 0 0x0200>;
383 reg = <0 0xe6180000 0 0x0400>;
389 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
396 #thermal-sensor-cells = <0>;
403 reg = <0 0xe61c0000 0 0x200>;
404 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
417 reg = <0 0xe61e0000 0 0x30>;
430 reg = <0 0xe6fc0000 0 0x30>;
443 reg = <0 0xe6fd0000 0 0x30>;
456 reg = <0 0xe6fe0000 0 0x30>;
469 reg = <0 0xffc00000 0 0x30>;
482 #size-cells = <0>;
485 reg = <0 0xe6500000 0 0x40>;
490 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
491 <&dmac2 0x91>, <&dmac2 0x90>;
499 #size-cells = <0>;
502 reg = <0 0xe6508000 0 0x40>;
507 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
508 <&dmac2 0x93>, <&dmac2 0x92>;
516 #size-cells = <0>;
519 reg = <0 0xe6510000 0 0x40>;
524 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
525 <&dmac2 0x95>, <&dmac2 0x94>;
533 #size-cells = <0>;
536 reg = <0 0xe66d0000 0 0x40>;
541 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
549 #size-cells = <0>;
552 reg = <0 0xe66d8000 0 0x40>;
557 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
565 #size-cells = <0>;
568 reg = <0 0xe66e0000 0 0x40>;
573 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
581 #size-cells = <0>;
584 reg = <0 0xe66e8000 0 0x40>;
589 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
597 #size-cells = <0>;
600 reg = <0 0xe6690000 0 0x40>;
613 reg = <0 0xe6540000 0 0x60>;
619 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
620 <&dmac2 0x31>, <&dmac2 0x30>;
631 reg = <0 0xe6550000 0 0x60>;
637 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
638 <&dmac2 0x33>, <&dmac2 0x32>;
649 reg = <0 0xe6560000 0 0x60>;
655 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
656 <&dmac2 0x35>, <&dmac2 0x34>;
667 reg = <0 0xe66a0000 0 0x60>;
673 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
684 reg = <0 0xe66b0000 0 0x60>;
690 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
700 reg = <0 0xe6590000 0 0x200>;
703 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
704 <&usb_dmac1 0>, <&usb_dmac1 1>;
717 reg = <0 0xe65a0000 0 0x100>;
731 reg = <0 0xe65b0000 0 0x100>;
745 reg = <0x0 0xe6601000 0 0x1000>;
754 reg = <0 0xe6700000 0 0x10000>;
783 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
796 reg = <0 0xe7300000 0 0x10000>;
825 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
838 reg = <0 0xe7310000 0 0x10000>;
879 reg = <0 0xe6740000 0 0x1000>;
880 renesas,ipmmu-main = <&ipmmu_mm 0>;
887 reg = <0 0xe7740000 0 0x1000>;
895 reg = <0 0xe6570000 0 0x1000>;
903 reg = <0 0xe67b0000 0 0x1000>;
912 reg = <0 0xec670000 0 0x1000>;
920 reg = <0 0xfd800000 0 0x1000>;
928 reg = <0 0xffc80000 0 0x1000>;
936 reg = <0 0xfe6b0000 0 0x1000>;
944 reg = <0 0xfebd0000 0 0x1000>;
952 reg = <0 0xfe990000 0 0x1000>;
961 reg = <0 0xe6800000 0 0x800>;
999 rx-internal-delay-ps = <0>;
1002 #size-cells = <0>;
1009 reg = <0 0xe6c30000 0 0x1000>;
1025 reg = <0 0xe6c38000 0 0x1000>;
1041 reg = <0 0xe66c0000 0 0x8000>;
1066 reg = <0 0xe6e30000 0 0x8>;
1076 reg = <0 0xe6e31000 0 0x8>;
1086 reg = <0 0xe6e32000 0 0x8>;
1096 reg = <0 0xe6e33000 0 0x8>;
1106 reg = <0 0xe6e34000 0 0x8>;
1116 reg = <0 0xe6e35000 0 0x8>;
1126 reg = <0 0xe6e36000 0 0x8>;
1137 reg = <0 0xe6e60000 0 64>;
1143 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1144 <&dmac2 0x51>, <&dmac2 0x50>;
1154 reg = <0 0xe6e68000 0 64>;
1160 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1161 <&dmac2 0x53>, <&dmac2 0x52>;
1171 reg = <0 0xe6e88000 0 64>;
1177 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1178 <&dmac2 0x13>, <&dmac2 0x12>;
1188 reg = <0 0xe6c50000 0 64>;
1194 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1204 reg = <0 0xe6c40000 0 64>;
1210 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1220 reg = <0 0xe6f30000 0 64>;
1226 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1236 reg = <0 0xe6e90000 0 0x0064>;
1239 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1240 <&dmac2 0x41>, <&dmac2 0x40>;
1245 #size-cells = <0>;
1252 reg = <0 0xe6ea0000 0 0x0064>;
1255 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1260 #size-cells = <0>;
1267 reg = <0 0xe6c00000 0 0x0064>;
1270 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1275 #size-cells = <0>;
1282 reg = <0 0xe6c10000 0 0x0064>;
1285 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1290 #size-cells = <0>;
1296 reg = <0 0xe6ef4000 0 0x1000>;
1306 #size-cells = <0>;
1310 #size-cells = <0>;
1324 reg = <0 0xe6ef5000 0 0x1000>;
1334 #size-cells = <0>;
1338 #size-cells = <0>;
1353 reg = <0 0xe6f40000 0 0x84>;
1357 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1368 reg = <0 0xe6f50000 0 0x84>;
1372 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1383 reg = <0 0xe6f60000 0 0x84>;
1387 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1398 reg = <0 0xe6f70000 0 0x84>;
1402 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1413 reg = <0 0xe6f80000 0 0x84>;
1417 dmas = <&dmac0 0x28>;
1428 reg = <0 0xe6f90000 0 0x84>;
1432 dmas = <&dmac0 0x2a>;
1443 reg = <0 0xe6fa0000 0 0x84>;
1447 dmas = <&dmac0 0x2c>;
1458 reg = <0 0xe6fb0000 0 0x84>;
1462 dmas = <&dmac0 0x2e>;
1474 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1480 * clkout : #clock-cells = <0>; <&rcar_sound>;
1484 reg = <0 0xec500000 0 0x1000>, /* SCU */
1485 <0 0xec5a0000 0 0x100>, /* ADG */
1486 <0 0xec540000 0 0x1000>, /* SSIU */
1487 <0 0xec541000 0 0x280>, /* SSI */
1488 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1511 "ssi.1", "ssi.0",
1514 "src.1", "src.0",
1515 "mix.1", "mix.0",
1516 "ctu.1", "ctu.0",
1517 "dvc.0", "dvc.1",
1529 "ssi.1", "ssi.0";
1533 ctu00: ctu-0 { };
1544 dvc0: dvc-0 {
1545 dmas = <&audma0 0xbc>;
1549 dmas = <&audma0 0xbe>;
1555 mix0: mix-0 { };
1560 src0: src-0 {
1562 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1567 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1572 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1577 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1582 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1587 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1592 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1597 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1602 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1607 dmas = <&audma0 0x97>, <&audma0 0xba>;
1613 ssi0: ssi-0 {
1615 dmas = <&audma0 0x01>, <&audma0 0x02>,
1616 <&audma0 0x15>, <&audma0 0x16>;
1621 dmas = <&audma0 0x03>, <&audma0 0x04>,
1622 <&audma0 0x49>, <&audma0 0x4a>;
1627 dmas = <&audma0 0x05>, <&audma0 0x06>,
1628 <&audma0 0x63>, <&audma0 0x64>;
1633 dmas = <&audma0 0x07>, <&audma0 0x08>,
1634 <&audma0 0x6f>, <&audma0 0x70>;
1639 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1640 <&audma0 0x71>, <&audma0 0x72>;
1645 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1646 <&audma0 0x73>, <&audma0 0x74>;
1651 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1652 <&audma0 0x75>, <&audma0 0x76>;
1657 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1658 <&audma0 0x79>, <&audma0 0x7a>;
1663 dmas = <&audma0 0x11>, <&audma0 0x12>,
1664 <&audma0 0x7b>, <&audma0 0x7c>;
1669 dmas = <&audma0 0x13>, <&audma0 0x14>,
1670 <&audma0 0x7d>, <&audma0 0x7e>;
1679 reg = <0 0xec520000 0 0x800>;
1691 reg = <0 0xec700000 0 0x10000>;
1720 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1733 reg = <0 0xee000000 0 0xc00>;
1744 reg = <0 0xee020000 0 0x400>;
1754 reg = <0 0xee080000 0 0x100>;
1766 reg = <0 0xee080100 0 0x100>;
1780 reg = <0 0xee080200 0 0x700>;
1792 reg = <0 0xee100000 0 0x2000>;
1806 reg = <0 0xee120000 0 0x2000>;
1820 reg = <0 0xee160000 0 0x2000>;
1834 reg = <0 0xee200000 0 0x200>,
1835 <0 0x08000000 0 0x04000000>,
1836 <0 0xee208000 0 0x100>;
1843 #size-cells = <0>;
1850 #address-cells = <0>;
1852 reg = <0x0 0xf1010000 0 0x1000>,
1853 <0x0 0xf1020000 0 0x20000>,
1854 <0x0 0xf1040000 0 0x20000>,
1855 <0x0 0xf1060000 0 0x20000>;
1867 reg = <0 0xfe000000 0 0x80000>;
1870 bus-range = <0x00 0xff>;
1872 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1873 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1874 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1875 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1877 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1882 interrupt-map-mask = <0 0 0 0>;
1883 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1893 reg = <0 0xfe960000 0 0x8000>;
1903 reg = <0 0xfe96f000 0 0x200>;
1912 reg = <0 0xfe9a0000 0 0x8000>;
1922 reg = <0 0xfe9af000 0 0x200>;
1931 reg = <0 0xfea20000 0 0x7000>;
1941 reg = <0 0xfea27000 0 0x200>;
1950 reg = <0 0xfea28000 0 0x7000>;
1960 reg = <0 0xfea2f000 0 0x200>;
1970 reg = <0 0xfea40000 0 0x1000>;
1979 reg = <0 0xfea50000 0 0x1000>;
1987 reg = <0 0xfeaa0000 0 0x10000>;
1996 #size-cells = <0>;
1998 port@0 {
1999 reg = <0>;
2004 #size-cells = <0>;
2008 csi40vin4: endpoint@0 {
2009 reg = <0>;
2022 reg = <0 0xfeb00000 0 0x40000>;
2026 clock-names = "du.0", "du.1";
2028 reset-names = "du.0";
2031 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2037 #size-cells = <0>;
2039 port@0 {
2040 reg = <0>;
2061 reg = <0 0xfeb90000 0 0x20>;
2071 #size-cells = <0>;
2073 port@0 {
2074 reg = <0>;
2088 reg = <0 0xfeb90100 0 0x20>;
2096 #size-cells = <0>;
2098 port@0 {
2099 reg = <0>;
2113 reg = <0 0xfff00044 0 4>;
2120 polling-delay = <0>;
2127 cooling-device = <&a53_0 0 2>;