Lines Matching +full:0 +full:xe6130000
18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
70 #size-cells = <0>;
72 a53_0: cpu@0 {
74 reg = <0>;
96 L2_CA53: cache-controller-0 {
106 #clock-cells = <0>;
108 clock-frequency = <0>;
114 #clock-cells = <0>;
115 clock-frequency = <0>;
133 #clock-cells = <0>;
134 clock-frequency = <0>;
147 reg = <0 0xe6020000 0 0x0c>;
158 reg = <0 0xe6050000 0 0x50>;
162 gpio-ranges = <&pfc 0 0 18>;
173 reg = <0 0xe6051000 0 0x50>;
177 gpio-ranges = <&pfc 0 32 23>;
188 reg = <0 0xe6052000 0 0x50>;
192 gpio-ranges = <&pfc 0 64 26>;
203 reg = <0 0xe6053000 0 0x50>;
207 gpio-ranges = <&pfc 0 96 16>;
218 reg = <0 0xe6054000 0 0x50>;
222 gpio-ranges = <&pfc 0 128 11>;
233 reg = <0 0xe6055000 0 0x50>;
237 gpio-ranges = <&pfc 0 160 20>;
248 reg = <0 0xe6055400 0 0x50>;
252 gpio-ranges = <&pfc 0 192 18>;
262 reg = <0 0xe6060000 0 0x508>;
268 reg = <0 0xe60f0000 0 0x1004>;
281 reg = <0 0xe6130000 0 0x1004>;
300 reg = <0 0xe6140000 0 0x1004>;
319 reg = <0 0xe6148000 0 0x1004>;
337 reg = <0 0xe6150000 0 0x1000>;
341 #power-domain-cells = <0>;
347 reg = <0 0xe6160000 0 0x0200>;
352 reg = <0 0xe6180000 0 0x0400>;
358 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
365 #thermal-sensor-cells = <0>;
372 reg = <0 0xe61c0000 0 0x200>;
373 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
386 reg = <0 0xe61e0000 0 0x30>;
399 reg = <0 0xe6fc0000 0 0x30>;
412 reg = <0 0xe6fd0000 0 0x30>;
425 reg = <0 0xe6fe0000 0 0x30>;
438 reg = <0 0xffc00000 0 0x30>;
451 #size-cells = <0>;
454 reg = <0 0xe6500000 0 0x40>;
459 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
460 <&dmac2 0x91>, <&dmac2 0x90>;
468 #size-cells = <0>;
471 reg = <0 0xe6508000 0 0x40>;
476 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
477 <&dmac2 0x93>, <&dmac2 0x92>;
485 #size-cells = <0>;
488 reg = <0 0xe6510000 0 0x40>;
493 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
494 <&dmac2 0x95>, <&dmac2 0x94>;
502 #size-cells = <0>;
505 reg = <0 0xe66d0000 0 0x40>;
510 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
518 #size-cells = <0>;
521 reg = <0 0xe66d8000 0 0x40>;
526 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
534 #size-cells = <0>;
537 reg = <0 0xe66e0000 0 0x40>;
542 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
550 #size-cells = <0>;
553 reg = <0 0xe66e8000 0 0x40>;
558 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
566 #size-cells = <0>;
569 reg = <0 0xe6690000 0 0x40>;
580 #size-cells = <0>;
584 reg = <0 0xe60b0000 0 0x425>;
589 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
598 reg = <0 0xe6540000 0 0x60>;
604 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
605 <&dmac2 0x31>, <&dmac2 0x30>;
616 reg = <0 0xe6550000 0 0x60>;
622 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
623 <&dmac2 0x33>, <&dmac2 0x32>;
634 reg = <0 0xe6560000 0 0x60>;
640 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
641 <&dmac2 0x35>, <&dmac2 0x34>;
652 reg = <0 0xe66a0000 0 0x60>;
658 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
669 reg = <0 0xe66b0000 0 0x60>;
675 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
685 reg = <0 0xe6590000 0 0x200>;
688 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
689 <&usb_dmac1 0>, <&usb_dmac1 1>;
702 reg = <0 0xe65a0000 0 0x100>;
716 reg = <0 0xe65b0000 0 0x100>;
730 reg = <0 0xe6700000 0 0x10000>;
759 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
772 reg = <0 0xe7300000 0 0x10000>;
801 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
814 reg = <0 0xe7310000 0 0x10000>;
855 reg = <0 0xe6740000 0 0x1000>;
856 renesas,ipmmu-main = <&ipmmu_mm 0>;
863 reg = <0 0xe7740000 0 0x1000>;
871 reg = <0 0xe6570000 0 0x1000>;
879 reg = <0 0xe67b0000 0 0x1000>;
888 reg = <0 0xec670000 0 0x1000>;
896 reg = <0 0xfd800000 0 0x1000>;
904 reg = <0 0xfe6b0000 0 0x1000>;
912 reg = <0 0xfebd0000 0 0x1000>;
920 reg = <0 0xfe990000 0 0x1000>;
929 reg = <0 0xe6800000 0 0x800>;
967 rx-internal-delay-ps = <0>;
970 #size-cells = <0>;
977 reg = <0 0xe6c30000 0 0x1000>;
993 reg = <0 0xe6c38000 0 0x1000>;
1009 reg = <0 0xe66c0000 0 0x8000>;
1034 reg = <0 0xe6e30000 0 0x8>;
1044 reg = <0 0xe6e31000 0 0x8>;
1054 reg = <0 0xe6e32000 0 0x8>;
1064 reg = <0 0xe6e33000 0 0x8>;
1074 reg = <0 0xe6e34000 0 0x8>;
1084 reg = <0 0xe6e35000 0 0x8>;
1094 reg = <0 0xe6e36000 0 0x8>;
1105 reg = <0 0xe6e60000 0 64>;
1111 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1112 <&dmac2 0x51>, <&dmac2 0x50>;
1122 reg = <0 0xe6e68000 0 64>;
1128 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1129 <&dmac2 0x53>, <&dmac2 0x52>;
1139 reg = <0 0xe6e88000 0 64>;
1145 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1146 <&dmac2 0x13>, <&dmac2 0x12>;
1156 reg = <0 0xe6c50000 0 64>;
1162 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1172 reg = <0 0xe6c40000 0 64>;
1178 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1188 reg = <0 0xe6f30000 0 64>;
1194 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1204 reg = <0 0xe6e90000 0 0x0064>;
1207 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1208 <&dmac2 0x41>, <&dmac2 0x40>;
1213 #size-cells = <0>;
1220 reg = <0 0xe6ea0000 0 0x0064>;
1223 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1228 #size-cells = <0>;
1235 reg = <0 0xe6c00000 0 0x0064>;
1238 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1243 #size-cells = <0>;
1250 reg = <0 0xe6c10000 0 0x0064>;
1253 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1258 #size-cells = <0>;
1264 reg = <0 0xe6ef4000 0 0x1000>;
1274 #size-cells = <0>;
1278 #size-cells = <0>;
1292 reg = <0 0xe6ef5000 0 0x1000>;
1302 #size-cells = <0>;
1306 #size-cells = <0>;
1322 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1328 * clkout : #clock-cells = <0>; <&rcar_sound>;
1333 reg = <0 0xec500000 0 0x1000>, /* SCU */
1334 <0 0xec5a0000 0 0x100>, /* ADG */
1335 <0 0xec540000 0 0x1000>, /* SSIU */
1336 <0 0xec541000 0 0x280>, /* SSI */
1337 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1360 "ssi.1", "ssi.0",
1363 "src.1", "src.0",
1364 "mix.1", "mix.0",
1365 "ctu.1", "ctu.0",
1366 "dvc.0", "dvc.1",
1378 "ssi.1", "ssi.0";
1382 ctu00: ctu-0 { };
1393 dvc0: dvc-0 {
1394 dmas = <&audma0 0xbc>;
1398 dmas = <&audma0 0xbe>;
1404 mix0: mix-0 { };
1409 src0: src-0 {
1411 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1416 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1421 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1426 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1431 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1436 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1441 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1446 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1451 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1456 dmas = <&audma0 0x97>, <&audma0 0xba>;
1462 ssi0: ssi-0 {
1464 dmas = <&audma0 0x01>, <&audma0 0x02>,
1465 <&audma0 0x15>, <&audma0 0x16>;
1470 dmas = <&audma0 0x03>, <&audma0 0x04>,
1471 <&audma0 0x49>, <&audma0 0x4a>;
1476 dmas = <&audma0 0x05>, <&audma0 0x06>,
1477 <&audma0 0x63>, <&audma0 0x64>;
1482 dmas = <&audma0 0x07>, <&audma0 0x08>,
1483 <&audma0 0x6f>, <&audma0 0x70>;
1488 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1489 <&audma0 0x71>, <&audma0 0x72>;
1494 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1495 <&audma0 0x73>, <&audma0 0x74>;
1500 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1501 <&audma0 0x75>, <&audma0 0x76>;
1506 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1507 <&audma0 0x79>, <&audma0 0x7a>;
1512 dmas = <&audma0 0x11>, <&audma0 0x12>,
1513 <&audma0 0x7b>, <&audma0 0x7c>;
1518 dmas = <&audma0 0x13>, <&audma0 0x14>,
1519 <&audma0 0x7d>, <&audma0 0x7e>;
1528 reg = <0 0xec700000 0 0x10000>;
1557 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1570 reg = <0 0xee000000 0 0xc00>;
1581 reg = <0 0xee020000 0 0x400>;
1591 reg = <0 0xee080000 0 0x100>;
1603 reg = <0 0xee080100 0 0x100>;
1617 reg = <0 0xee080200 0 0x700>;
1629 reg = <0 0xee100000 0 0x2000>;
1642 reg = <0 0xee120000 0 0x2000>;
1655 reg = <0 0xee160000 0 0x2000>;
1668 reg = <0 0xee200000 0 0x200>,
1669 <0 0x08000000 0 0x4000000>,
1670 <0 0xee208000 0 0x100>;
1677 #size-cells = <0>;
1684 #address-cells = <0>;
1686 reg = <0x0 0xf1010000 0 0x1000>,
1687 <0x0 0xf1020000 0 0x20000>,
1688 <0x0 0xf1040000 0 0x20000>,
1689 <0x0 0xf1060000 0 0x20000>;
1701 reg = <0 0xfe000000 0 0x80000>;
1704 bus-range = <0x00 0xff>;
1706 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1707 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1708 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1709 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1711 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1716 interrupt-map-mask = <0 0 0 0>;
1717 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1728 reg = <0x0 0xfe000000 0 0x80000>,
1729 <0x0 0xfe100000 0 0x100000>,
1730 <0x0 0xfe200000 0 0x200000>,
1731 <0x0 0x30000000 0 0x8000000>,
1732 <0x0 0x38000000 0 0x8000000>;
1746 reg = <0 0xfe960000 0 0x8000>;
1756 reg = <0 0xfea20000 0 0x7000>;
1766 reg = <0 0xfea28000 0 0x7000>;
1776 reg = <0 0xfe9a0000 0 0x8000>;
1786 reg = <0 0xfe96f000 0 0x200>;
1795 reg = <0 0xfea27000 0 0x200>;
1804 reg = <0 0xfea2f000 0 0x200>;
1813 reg = <0 0xfe9af000 0 0x200>;
1822 reg = <0 0xfeaa0000 0 0x10000>;
1831 #size-cells = <0>;
1833 port@0 {
1834 reg = <0>;
1839 #size-cells = <0>;
1843 csi40vin4: endpoint@0 {
1844 reg = <0>;
1857 reg = <0 0xfeb00000 0 0x40000>;
1861 clock-names = "du.0", "du.1";
1863 reset-names = "du.0";
1864 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1870 #size-cells = <0>;
1872 port@0 {
1873 reg = <0>;
1894 reg = <0 0xfeb90000 0 0x20>;
1904 #size-cells = <0>;
1906 port@0 {
1907 reg = <0>;
1921 reg = <0 0xfeb90100 0 0x20>;
1929 #size-cells = <0>;
1931 port@0 {
1932 reg = <0>;
1946 reg = <0 0xfff00044 0 4>;
1953 polling-delay = <0>;
1960 cooling-device = <&a53_0 0 2>;
1992 #clock-cells = <0>;
1993 clock-frequency = <0>;
1998 #clock-cells = <0>;
1999 clock-frequency = <0>;