Lines Matching +full:dma +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774a1-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <0>;
43 /* External CAN clock - to be overridden by boards that provide it */
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
50 cluster0_opp: opp-table-0 {
51 compatible = "operating-points-v2";
52 opp-shared;
54 opp-500000000 {
55 opp-hz = /bits/ 64 <500000000>;
56 opp-microvolt = <820000>;
57 clock-latency-ns = <300000>;
59 opp-1000000000 {
60 opp-hz = /bits/ 64 <1000000000>;
61 opp-microvolt = <820000>;
62 clock-latency-ns = <300000>;
64 opp-1500000000 {
65 opp-hz = /bits/ 64 <1500000000>;
66 opp-microvolt = <820000>;
67 clock-latency-ns = <300000>;
68 opp-suspend;
72 cluster1_opp: opp-table-1 {
73 compatible = "operating-points-v2";
74 opp-shared;
76 opp-800000000 {
77 opp-hz = /bits/ 64 <800000000>;
78 opp-microvolt = <820000>;
79 clock-latency-ns = <300000>;
81 opp-1000000000 {
82 opp-hz = /bits/ 64 <1000000000>;
83 opp-microvolt = <820000>;
84 clock-latency-ns = <300000>;
86 opp-1200000000 {
87 opp-hz = /bits/ 64 <1200000000>;
88 opp-microvolt = <820000>;
89 clock-latency-ns = <300000>;
94 #address-cells = <1>;
95 #size-cells = <0>;
97 cpu-map {
124 compatible = "arm,cortex-a57";
127 power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
128 next-level-cache = <&L2_CA57>;
129 enable-method = "psci";
130 dynamic-power-coefficient = <854>;
132 operating-points-v2 = <&cluster0_opp>;
133 capacity-dmips-mhz = <1024>;
134 #cooling-cells = <2>;
138 compatible = "arm,cortex-a57";
141 power-domains = <&sysc R8A774A1_PD_CA57_CPU1>;
142 next-level-cache = <&L2_CA57>;
143 enable-method = "psci";
145 operating-points-v2 = <&cluster0_opp>;
146 capacity-dmips-mhz = <1024>;
147 #cooling-cells = <2>;
151 compatible = "arm,cortex-a53";
154 power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
155 next-level-cache = <&L2_CA53>;
156 enable-method = "psci";
157 #cooling-cells = <2>;
158 dynamic-power-coefficient = <277>;
160 operating-points-v2 = <&cluster1_opp>;
161 capacity-dmips-mhz = <560>;
165 compatible = "arm,cortex-a53";
168 power-domains = <&sysc R8A774A1_PD_CA53_CPU1>;
169 next-level-cache = <&L2_CA53>;
170 enable-method = "psci";
172 operating-points-v2 = <&cluster1_opp>;
173 capacity-dmips-mhz = <560>;
177 compatible = "arm,cortex-a53";
180 power-domains = <&sysc R8A774A1_PD_CA53_CPU2>;
181 next-level-cache = <&L2_CA53>;
182 enable-method = "psci";
184 operating-points-v2 = <&cluster1_opp>;
185 capacity-dmips-mhz = <560>;
189 compatible = "arm,cortex-a53";
192 power-domains = <&sysc R8A774A1_PD_CA53_CPU3>;
193 next-level-cache = <&L2_CA53>;
194 enable-method = "psci";
196 operating-points-v2 = <&cluster1_opp>;
197 capacity-dmips-mhz = <560>;
200 L2_CA57: cache-controller-0 {
202 power-domains = <&sysc R8A774A1_PD_CA57_SCU>;
203 cache-unified;
204 cache-level = <2>;
207 L2_CA53: cache-controller-1 {
209 power-domains = <&sysc R8A774A1_PD_CA53_SCU>;
210 cache-unified;
211 cache-level = <2>;
216 compatible = "fixed-clock";
217 #clock-cells = <0>;
219 clock-frequency = <0>;
223 compatible = "fixed-clock";
224 #clock-cells = <0>;
226 clock-frequency = <0>;
229 /* External PCIe clock - can be overridden by the board */
231 compatible = "fixed-clock";
232 #clock-cells = <0>;
233 clock-frequency = <0>;
237 compatible = "arm,cortex-a53-pmu";
238 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
242 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
246 compatible = "arm,cortex-a57-pmu";
247 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
249 interrupt-affinity = <&a57_0>, <&a57_1>;
253 compatible = "arm,psci-1.0", "arm,psci-0.2";
257 /* External SCIF clock - to be overridden by boards that provide it */
259 compatible = "fixed-clock";
260 #clock-cells = <0>;
261 clock-frequency = <0>;
265 compatible = "simple-bus";
266 interrupt-parent = <&gic>;
267 #address-cells = <2>;
268 #size-cells = <2>;
272 compatible = "renesas,r8a774a1-wdt",
273 "renesas,rcar-gen3-wdt";
277 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
283 compatible = "renesas,gpio-r8a774a1",
284 "renesas,rcar-gen3-gpio";
287 #gpio-cells = <2>;
288 gpio-controller;
289 gpio-ranges = <&pfc 0 0 16>;
290 #interrupt-cells = <2>;
291 interrupt-controller;
293 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
298 compatible = "renesas,gpio-r8a774a1",
299 "renesas,rcar-gen3-gpio";
302 #gpio-cells = <2>;
303 gpio-controller;
304 gpio-ranges = <&pfc 0 32 29>;
305 #interrupt-cells = <2>;
306 interrupt-controller;
308 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
313 compatible = "renesas,gpio-r8a774a1",
314 "renesas,rcar-gen3-gpio";
317 #gpio-cells = <2>;
318 gpio-controller;
319 gpio-ranges = <&pfc 0 64 15>;
320 #interrupt-cells = <2>;
321 interrupt-controller;
323 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
328 compatible = "renesas,gpio-r8a774a1",
329 "renesas,rcar-gen3-gpio";
332 #gpio-cells = <2>;
333 gpio-controller;
334 gpio-ranges = <&pfc 0 96 16>;
335 #interrupt-cells = <2>;
336 interrupt-controller;
338 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
343 compatible = "renesas,gpio-r8a774a1",
344 "renesas,rcar-gen3-gpio";
347 #gpio-cells = <2>;
348 gpio-controller;
349 gpio-ranges = <&pfc 0 128 18>;
350 #interrupt-cells = <2>;
351 interrupt-controller;
353 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
358 compatible = "renesas,gpio-r8a774a1",
359 "renesas,rcar-gen3-gpio";
362 #gpio-cells = <2>;
363 gpio-controller;
364 gpio-ranges = <&pfc 0 160 26>;
365 #interrupt-cells = <2>;
366 interrupt-controller;
368 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
373 compatible = "renesas,gpio-r8a774a1",
374 "renesas,rcar-gen3-gpio";
377 #gpio-cells = <2>;
378 gpio-controller;
379 gpio-ranges = <&pfc 0 192 32>;
380 #interrupt-cells = <2>;
381 interrupt-controller;
383 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
388 compatible = "renesas,gpio-r8a774a1",
389 "renesas,rcar-gen3-gpio";
392 #gpio-cells = <2>;
393 gpio-controller;
394 gpio-ranges = <&pfc 0 224 4>;
395 #interrupt-cells = <2>;
396 interrupt-controller;
398 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
403 compatible = "renesas,pfc-r8a774a1";
408 compatible = "renesas,r8a774a1-cmt0",
409 "renesas,rcar-gen3-cmt0";
414 clock-names = "fck";
415 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
421 compatible = "renesas,r8a774a1-cmt1",
422 "renesas,rcar-gen3-cmt1";
433 clock-names = "fck";
434 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
440 compatible = "renesas,r8a774a1-cmt1",
441 "renesas,rcar-gen3-cmt1";
452 clock-names = "fck";
453 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
459 compatible = "renesas,r8a774a1-cmt1",
460 "renesas,rcar-gen3-cmt1";
471 clock-names = "fck";
472 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
477 cpg: clock-controller@e6150000 {
478 compatible = "renesas,r8a774a1-cpg-mssr";
481 clock-names = "extal", "extalr";
482 #clock-cells = <2>;
483 #power-domain-cells = <0>;
484 #reset-cells = <1>;
487 rst: reset-controller@e6160000 {
488 compatible = "renesas,r8a774a1-rst";
492 sysc: system-controller@e6180000 {
493 compatible = "renesas,r8a774a1-sysc";
495 #power-domain-cells = <1>;
499 compatible = "renesas,r8a774a1-thermal";
507 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
509 #thermal-sensor-cells = <1>;
512 intc_ex: interrupt-controller@e61c0000 {
513 compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
514 #interrupt-cells = <2>;
515 interrupt-controller;
524 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
529 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
535 clock-names = "fck";
536 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
542 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
548 clock-names = "fck";
549 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
555 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
561 clock-names = "fck";
562 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
568 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
574 clock-names = "fck";
575 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
581 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
587 clock-names = "fck";
588 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
594 #address-cells = <1>;
595 #size-cells = <0>;
596 compatible = "renesas,i2c-r8a774a1",
597 "renesas,rcar-gen3-i2c";
601 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
605 dma-names = "tx", "rx", "tx", "rx";
606 i2c-scl-internal-delay-ns = <110>;
611 #address-cells = <1>;
612 #size-cells = <0>;
613 compatible = "renesas,i2c-r8a774a1",
614 "renesas,rcar-gen3-i2c";
618 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
622 dma-names = "tx", "rx", "tx", "rx";
623 i2c-scl-internal-delay-ns = <6>;
628 #address-cells = <1>;
629 #size-cells = <0>;
630 compatible = "renesas,i2c-r8a774a1",
631 "renesas,rcar-gen3-i2c";
635 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
639 dma-names = "tx", "rx", "tx", "rx";
640 i2c-scl-internal-delay-ns = <6>;
645 #address-cells = <1>;
646 #size-cells = <0>;
647 compatible = "renesas,i2c-r8a774a1",
648 "renesas,rcar-gen3-i2c";
652 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
655 dma-names = "tx", "rx";
656 i2c-scl-internal-delay-ns = <110>;
661 #address-cells = <1>;
662 #size-cells = <0>;
663 compatible = "renesas,i2c-r8a774a1",
664 "renesas,rcar-gen3-i2c";
668 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
671 dma-names = "tx", "rx";
672 i2c-scl-internal-delay-ns = <110>;
677 #address-cells = <1>;
678 #size-cells = <0>;
679 compatible = "renesas,i2c-r8a774a1",
680 "renesas,rcar-gen3-i2c";
684 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
687 dma-names = "tx", "rx";
688 i2c-scl-internal-delay-ns = <110>;
693 #address-cells = <1>;
694 #size-cells = <0>;
695 compatible = "renesas,i2c-r8a774a1",
696 "renesas,rcar-gen3-i2c";
700 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
703 dma-names = "tx", "rx";
704 i2c-scl-internal-delay-ns = <6>;
709 #address-cells = <1>;
710 #size-cells = <0>;
711 compatible = "renesas,iic-r8a774a1",
712 "renesas,rcar-gen3-iic",
713 "renesas,rmobile-iic";
717 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
720 dma-names = "tx", "rx";
725 compatible = "renesas,hscif-r8a774a1",
726 "renesas,rcar-gen3-hscif",
733 clock-names = "fck", "brg_int", "scif_clk";
736 dma-names = "tx", "rx", "tx", "rx";
737 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
743 compatible = "renesas,hscif-r8a774a1",
744 "renesas,rcar-gen3-hscif",
751 clock-names = "fck", "brg_int", "scif_clk";
754 dma-names = "tx", "rx", "tx", "rx";
755 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
761 compatible = "renesas,hscif-r8a774a1",
762 "renesas,rcar-gen3-hscif",
769 clock-names = "fck", "brg_int", "scif_clk";
772 dma-names = "tx", "rx", "tx", "rx";
773 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
779 compatible = "renesas,hscif-r8a774a1",
780 "renesas,rcar-gen3-hscif",
787 clock-names = "fck", "brg_int", "scif_clk";
789 dma-names = "tx", "rx";
790 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
796 compatible = "renesas,hscif-r8a774a1",
797 "renesas,rcar-gen3-hscif",
804 clock-names = "fck", "brg_int", "scif_clk";
806 dma-names = "tx", "rx";
807 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
813 compatible = "renesas,usbhs-r8a774a1",
814 "renesas,rcar-gen3-usbhs";
820 dma-names = "ch0", "ch1", "ch2", "ch3";
823 phy-names = "usb";
824 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
829 usb2_clksel: clock-controller@e6590630 {
830 compatible = "renesas,r8a774a1-rcar-usb2-clock-sel",
831 "renesas,rcar-gen3-usb2-clock-sel";
835 clock-names = "ehci_ohci", "hs-usb-if",
837 #clock-cells = <0>;
838 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
840 reset-names = "ehci_ohci", "hs-usb-if";
844 usb_dmac0: dma-controller@e65a0000 {
845 compatible = "renesas,r8a774a1-usb-dmac",
846 "renesas,usb-dmac";
850 interrupt-names = "ch0", "ch1";
852 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
854 #dma-cells = <1>;
855 dma-channels = <2>;
858 usb_dmac1: dma-controller@e65b0000 {
859 compatible = "renesas,r8a774a1-usb-dmac",
860 "renesas,usb-dmac";
864 interrupt-names = "ch0", "ch1";
866 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
868 #dma-cells = <1>;
869 dma-channels = <2>;
872 usb3_phy0: usb-phy@e65ee000 {
873 compatible = "renesas,r8a774a1-usb3-phy",
874 "renesas,rcar-gen3-usb3-phy";
878 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
879 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
881 #phy-cells = <0>;
885 dmac0: dma-controller@e6700000 {
886 compatible = "renesas,dmac-r8a774a1",
887 "renesas,rcar-dmac";
906 interrupt-names = "error",
912 clock-names = "fck";
913 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
915 #dma-cells = <1>;
916 dma-channels = <16>;
927 dmac1: dma-controller@e7300000 {
928 compatible = "renesas,dmac-r8a774a1",
929 "renesas,rcar-dmac";
948 interrupt-names = "error",
954 clock-names = "fck";
955 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
957 #dma-cells = <1>;
958 dma-channels = <16>;
969 dmac2: dma-controller@e7310000 {
970 compatible = "renesas,dmac-r8a774a1",
971 "renesas,rcar-dmac";
990 interrupt-names = "error",
996 clock-names = "fck";
997 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
999 #dma-cells = <1>;
1000 dma-channels = <16>;
1012 compatible = "renesas,ipmmu-r8a774a1";
1014 renesas,ipmmu-main = <&ipmmu_mm 0>;
1015 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1016 #iommu-cells = <1>;
1020 compatible = "renesas,ipmmu-r8a774a1";
1022 renesas,ipmmu-main = <&ipmmu_mm 1>;
1023 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1024 #iommu-cells = <1>;
1028 compatible = "renesas,ipmmu-r8a774a1";
1030 renesas,ipmmu-main = <&ipmmu_mm 2>;
1031 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1032 #iommu-cells = <1>;
1036 compatible = "renesas,ipmmu-r8a774a1";
1040 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1041 #iommu-cells = <1>;
1045 compatible = "renesas,ipmmu-r8a774a1";
1047 renesas,ipmmu-main = <&ipmmu_mm 4>;
1048 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1049 #iommu-cells = <1>;
1053 compatible = "renesas,ipmmu-r8a774a1";
1055 renesas,ipmmu-main = <&ipmmu_mm 5>;
1056 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1057 #iommu-cells = <1>;
1061 compatible = "renesas,ipmmu-r8a774a1";
1063 renesas,ipmmu-main = <&ipmmu_mm 6>;
1064 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1065 #iommu-cells = <1>;
1069 compatible = "renesas,ipmmu-r8a774a1";
1071 renesas,ipmmu-main = <&ipmmu_mm 8>;
1072 power-domains = <&sysc R8A774A1_PD_A3VC>;
1073 #iommu-cells = <1>;
1077 compatible = "renesas,ipmmu-r8a774a1";
1079 renesas,ipmmu-main = <&ipmmu_mm 9>;
1080 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1081 #iommu-cells = <1>;
1085 compatible = "renesas,etheravb-r8a774a1",
1086 "renesas,etheravb-rcar-gen3";
1113 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1121 clock-names = "fck";
1122 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1124 phy-mode = "rgmii";
1125 rx-internal-delay-ps = <0>;
1126 tx-internal-delay-ps = <0>;
1128 #address-cells = <1>;
1129 #size-cells = <0>;
1134 compatible = "renesas,can-r8a774a1",
1135 "renesas,rcar-gen3-can";
1141 clock-names = "clkp1", "clkp2", "can_clk";
1142 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1143 assigned-clock-rates = <40000000>;
1144 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1150 compatible = "renesas,can-r8a774a1",
1151 "renesas,rcar-gen3-can";
1157 clock-names = "clkp1", "clkp2", "can_clk";
1158 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1159 assigned-clock-rates = <40000000>;
1160 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1166 compatible = "renesas,r8a774a1-canfd",
1167 "renesas,rcar-gen3-canfd";
1171 interrupt-names = "ch_int", "g_int";
1175 clock-names = "fck", "canfd", "can_clk";
1176 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1177 assigned-clock-rates = <40000000>;
1178 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1192 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1194 #pwm-cells = <2>;
1197 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1202 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1204 #pwm-cells = <2>;
1207 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1212 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1214 #pwm-cells = <2>;
1217 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1222 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1224 #pwm-cells = <2>;
1227 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1232 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1234 #pwm-cells = <2>;
1237 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1242 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1244 #pwm-cells = <2>;
1247 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1252 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1254 #pwm-cells = <2>;
1257 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1262 compatible = "renesas,scif-r8a774a1",
1263 "renesas,rcar-gen3-scif", "renesas,scif";
1269 clock-names = "fck", "brg_int", "scif_clk";
1272 dma-names = "tx", "rx", "tx", "rx";
1273 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1279 compatible = "renesas,scif-r8a774a1",
1280 "renesas,rcar-gen3-scif", "renesas,scif";
1286 clock-names = "fck", "brg_int", "scif_clk";
1289 dma-names = "tx", "rx", "tx", "rx";
1290 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1296 compatible = "renesas,scif-r8a774a1",
1297 "renesas,rcar-gen3-scif", "renesas,scif";
1303 clock-names = "fck", "brg_int", "scif_clk";
1306 dma-names = "tx", "rx", "tx", "rx";
1307 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1313 compatible = "renesas,scif-r8a774a1",
1314 "renesas,rcar-gen3-scif", "renesas,scif";
1320 clock-names = "fck", "brg_int", "scif_clk";
1322 dma-names = "tx", "rx";
1323 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1329 compatible = "renesas,scif-r8a774a1",
1330 "renesas,rcar-gen3-scif", "renesas,scif";
1336 clock-names = "fck", "brg_int", "scif_clk";
1338 dma-names = "tx", "rx";
1339 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1345 compatible = "renesas,scif-r8a774a1",
1346 "renesas,rcar-gen3-scif", "renesas,scif";
1352 clock-names = "fck", "brg_int", "scif_clk";
1355 dma-names = "tx", "rx", "tx", "rx";
1356 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1362 compatible = "renesas,msiof-r8a774a1",
1363 "renesas,rcar-gen3-msiof";
1369 dma-names = "tx", "rx", "tx", "rx";
1370 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1372 #address-cells = <1>;
1373 #size-cells = <0>;
1378 compatible = "renesas,msiof-r8a774a1",
1379 "renesas,rcar-gen3-msiof";
1385 dma-names = "tx", "rx", "tx", "rx";
1386 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1388 #address-cells = <1>;
1389 #size-cells = <0>;
1394 compatible = "renesas,msiof-r8a774a1",
1395 "renesas,rcar-gen3-msiof";
1400 dma-names = "tx", "rx";
1401 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1403 #address-cells = <1>;
1404 #size-cells = <0>;
1409 compatible = "renesas,msiof-r8a774a1",
1410 "renesas,rcar-gen3-msiof";
1415 dma-names = "tx", "rx";
1416 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1418 #address-cells = <1>;
1419 #size-cells = <0>;
1424 compatible = "renesas,vin-r8a774a1";
1428 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1434 #address-cells = <1>;
1435 #size-cells = <0>;
1438 #address-cells = <1>;
1439 #size-cells = <0>;
1445 remote-endpoint = <&csi20vin0>;
1449 remote-endpoint = <&csi40vin0>;
1456 compatible = "renesas,vin-r8a774a1";
1460 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1466 #address-cells = <1>;
1467 #size-cells = <0>;
1470 #address-cells = <1>;
1471 #size-cells = <0>;
1477 remote-endpoint = <&csi20vin1>;
1481 remote-endpoint = <&csi40vin1>;
1488 compatible = "renesas,vin-r8a774a1";
1492 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1498 #address-cells = <1>;
1499 #size-cells = <0>;
1502 #address-cells = <1>;
1503 #size-cells = <0>;
1509 remote-endpoint = <&csi20vin2>;
1513 remote-endpoint = <&csi40vin2>;
1520 compatible = "renesas,vin-r8a774a1";
1524 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1530 #address-cells = <1>;
1531 #size-cells = <0>;
1534 #address-cells = <1>;
1535 #size-cells = <0>;
1541 remote-endpoint = <&csi20vin3>;
1545 remote-endpoint = <&csi40vin3>;
1552 compatible = "renesas,vin-r8a774a1";
1556 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1562 #address-cells = <1>;
1563 #size-cells = <0>;
1566 #address-cells = <1>;
1567 #size-cells = <0>;
1573 remote-endpoint = <&csi20vin4>;
1577 remote-endpoint = <&csi40vin4>;
1584 compatible = "renesas,vin-r8a774a1";
1588 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1594 #address-cells = <1>;
1595 #size-cells = <0>;
1598 #address-cells = <1>;
1599 #size-cells = <0>;
1605 remote-endpoint = <&csi20vin5>;
1609 remote-endpoint = <&csi40vin5>;
1616 compatible = "renesas,vin-r8a774a1";
1620 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1626 #address-cells = <1>;
1627 #size-cells = <0>;
1630 #address-cells = <1>;
1631 #size-cells = <0>;
1637 remote-endpoint = <&csi20vin6>;
1641 remote-endpoint = <&csi40vin6>;
1648 compatible = "renesas,vin-r8a774a1";
1652 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1658 #address-cells = <1>;
1659 #size-cells = <0>;
1662 #address-cells = <1>;
1663 #size-cells = <0>;
1669 remote-endpoint = <&csi20vin7>;
1673 remote-endpoint = <&csi40vin7>;
1681 * #sound-dai-cells is required
1683 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1684 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1687 * #clock-cells is required for audio_clkout0/1/2/3
1689 * clkout : #clock-cells = <0>; <&rcar_sound>;
1690 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1692 compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
1698 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1717 clock-names = "ssi-all",
1728 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1735 reset-names = "ssi-all",
1742 ctu00: ctu-0 { };
1743 ctu01: ctu-1 { };
1744 ctu02: ctu-2 { };
1745 ctu03: ctu-3 { };
1746 ctu10: ctu-4 { };
1747 ctu11: ctu-5 { };
1748 ctu12: ctu-6 { };
1749 ctu13: ctu-7 { };
1753 dvc0: dvc-0 {
1755 dma-names = "tx";
1757 dvc1: dvc-1 {
1759 dma-names = "tx";
1764 mix0: mix-0 { };
1765 mix1: mix-1 { };
1769 src0: src-0 {
1772 dma-names = "rx", "tx";
1774 src1: src-1 {
1777 dma-names = "rx", "tx";
1779 src2: src-2 {
1782 dma-names = "rx", "tx";
1784 src3: src-3 {
1787 dma-names = "rx", "tx";
1789 src4: src-4 {
1792 dma-names = "rx", "tx";
1794 src5: src-5 {
1797 dma-names = "rx", "tx";
1799 src6: src-6 {
1802 dma-names = "rx", "tx";
1804 src7: src-7 {
1807 dma-names = "rx", "tx";
1809 src8: src-8 {
1812 dma-names = "rx", "tx";
1814 src9: src-9 {
1817 dma-names = "rx", "tx";
1822 ssi0: ssi-0 {
1825 dma-names = "rx", "tx";
1827 ssi1: ssi-1 {
1830 dma-names = "rx", "tx";
1832 ssi2: ssi-2 {
1835 dma-names = "rx", "tx";
1837 ssi3: ssi-3 {
1840 dma-names = "rx", "tx";
1842 ssi4: ssi-4 {
1845 dma-names = "rx", "tx";
1847 ssi5: ssi-5 {
1850 dma-names = "rx", "tx";
1852 ssi6: ssi-6 {
1855 dma-names = "rx", "tx";
1857 ssi7: ssi-7 {
1860 dma-names = "rx", "tx";
1862 ssi8: ssi-8 {
1865 dma-names = "rx", "tx";
1867 ssi9: ssi-9 {
1870 dma-names = "rx", "tx";
1875 ssiu00: ssiu-0 {
1877 dma-names = "rx", "tx";
1879 ssiu01: ssiu-1 {
1881 dma-names = "rx", "tx";
1883 ssiu02: ssiu-2 {
1885 dma-names = "rx", "tx";
1887 ssiu03: ssiu-3 {
1889 dma-names = "rx", "tx";
1891 ssiu04: ssiu-4 {
1893 dma-names = "rx", "tx";
1895 ssiu05: ssiu-5 {
1897 dma-names = "rx", "tx";
1899 ssiu06: ssiu-6 {
1901 dma-names = "rx", "tx";
1903 ssiu07: ssiu-7 {
1905 dma-names = "rx", "tx";
1907 ssiu10: ssiu-8 {
1909 dma-names = "rx", "tx";
1911 ssiu11: ssiu-9 {
1913 dma-names = "rx", "tx";
1915 ssiu12: ssiu-10 {
1917 dma-names = "rx", "tx";
1919 ssiu13: ssiu-11 {
1921 dma-names = "rx", "tx";
1923 ssiu14: ssiu-12 {
1925 dma-names = "rx", "tx";
1927 ssiu15: ssiu-13 {
1929 dma-names = "rx", "tx";
1931 ssiu16: ssiu-14 {
1933 dma-names = "rx", "tx";
1935 ssiu17: ssiu-15 {
1937 dma-names = "rx", "tx";
1939 ssiu20: ssiu-16 {
1941 dma-names = "rx", "tx";
1943 ssiu21: ssiu-17 {
1945 dma-names = "rx", "tx";
1947 ssiu22: ssiu-18 {
1949 dma-names = "rx", "tx";
1951 ssiu23: ssiu-19 {
1953 dma-names = "rx", "tx";
1955 ssiu24: ssiu-20 {
1957 dma-names = "rx", "tx";
1959 ssiu25: ssiu-21 {
1961 dma-names = "rx", "tx";
1963 ssiu26: ssiu-22 {
1965 dma-names = "rx", "tx";
1967 ssiu27: ssiu-23 {
1969 dma-names = "rx", "tx";
1971 ssiu30: ssiu-24 {
1973 dma-names = "rx", "tx";
1975 ssiu31: ssiu-25 {
1977 dma-names = "rx", "tx";
1979 ssiu32: ssiu-26 {
1981 dma-names = "rx", "tx";
1983 ssiu33: ssiu-27 {
1985 dma-names = "rx", "tx";
1987 ssiu34: ssiu-28 {
1989 dma-names = "rx", "tx";
1991 ssiu35: ssiu-29 {
1993 dma-names = "rx", "tx";
1995 ssiu36: ssiu-30 {
1997 dma-names = "rx", "tx";
1999 ssiu37: ssiu-31 {
2001 dma-names = "rx", "tx";
2003 ssiu40: ssiu-32 {
2005 dma-names = "rx", "tx";
2007 ssiu41: ssiu-33 {
2009 dma-names = "rx", "tx";
2011 ssiu42: ssiu-34 {
2013 dma-names = "rx", "tx";
2015 ssiu43: ssiu-35 {
2017 dma-names = "rx", "tx";
2019 ssiu44: ssiu-36 {
2021 dma-names = "rx", "tx";
2023 ssiu45: ssiu-37 {
2025 dma-names = "rx", "tx";
2027 ssiu46: ssiu-38 {
2029 dma-names = "rx", "tx";
2031 ssiu47: ssiu-39 {
2033 dma-names = "rx", "tx";
2035 ssiu50: ssiu-40 {
2037 dma-names = "rx", "tx";
2039 ssiu60: ssiu-41 {
2041 dma-names = "rx", "tx";
2043 ssiu70: ssiu-42 {
2045 dma-names = "rx", "tx";
2047 ssiu80: ssiu-43 {
2049 dma-names = "rx", "tx";
2051 ssiu90: ssiu-44 {
2053 dma-names = "rx", "tx";
2055 ssiu91: ssiu-45 {
2057 dma-names = "rx", "tx";
2059 ssiu92: ssiu-46 {
2061 dma-names = "rx", "tx";
2063 ssiu93: ssiu-47 {
2065 dma-names = "rx", "tx";
2067 ssiu94: ssiu-48 {
2069 dma-names = "rx", "tx";
2071 ssiu95: ssiu-49 {
2073 dma-names = "rx", "tx";
2075 ssiu96: ssiu-50 {
2077 dma-names = "rx", "tx";
2079 ssiu97: ssiu-51 {
2081 dma-names = "rx", "tx";
2086 audma0: dma-controller@ec700000 {
2087 compatible = "renesas,dmac-r8a774a1",
2088 "renesas,rcar-dmac";
2107 interrupt-names = "error",
2113 clock-names = "fck";
2114 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2116 #dma-cells = <1>;
2117 dma-channels = <16>;
2128 audma1: dma-controller@ec720000 {
2129 compatible = "renesas,dmac-r8a774a1",
2130 "renesas,rcar-dmac";
2149 interrupt-names = "error",
2155 clock-names = "fck";
2156 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2158 #dma-cells = <1>;
2159 dma-channels = <16>;
2171 compatible = "renesas,xhci-r8a774a1",
2172 "renesas,rcar-gen3-xhci";
2176 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2182 compatible = "renesas,r8a774a1-usb3-peri",
2183 "renesas,rcar-gen3-usb3-peri";
2187 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2193 compatible = "generic-ohci";
2198 phy-names = "usb";
2199 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2205 compatible = "generic-ohci";
2210 phy-names = "usb";
2211 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2217 compatible = "generic-ehci";
2222 phy-names = "usb";
2224 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2230 compatible = "generic-ehci";
2235 phy-names = "usb";
2237 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2242 usb2_phy0: usb-phy@ee080200 {
2243 compatible = "renesas,usb2-phy-r8a774a1",
2244 "renesas,rcar-gen3-usb2-phy";
2248 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2250 #phy-cells = <1>;
2254 usb2_phy1: usb-phy@ee0a0200 {
2255 compatible = "renesas,usb2-phy-r8a774a1",
2256 "renesas,rcar-gen3-usb2-phy";
2259 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2261 #phy-cells = <1>;
2266 compatible = "renesas,sdhi-r8a774a1",
2267 "renesas,rcar-gen3-sdhi";
2271 clock-names = "core", "clkh";
2272 max-frequency = <200000000>;
2273 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2279 compatible = "renesas,sdhi-r8a774a1",
2280 "renesas,rcar-gen3-sdhi";
2284 clock-names = "core", "clkh";
2285 max-frequency = <200000000>;
2286 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2292 compatible = "renesas,sdhi-r8a774a1",
2293 "renesas,rcar-gen3-sdhi";
2297 clock-names = "core", "clkh";
2298 max-frequency = <200000000>;
2299 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2305 compatible = "renesas,sdhi-r8a774a1",
2306 "renesas,rcar-gen3-sdhi";
2310 clock-names = "core", "clkh";
2311 max-frequency = <200000000>;
2312 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2318 compatible = "renesas,r8a774a1-rpc-if",
2319 "renesas,rcar-gen3-rpc-if";
2323 reg-names = "regs", "dirmap", "wbuf";
2326 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2328 #address-cells = <1>;
2329 #size-cells = <0>;
2333 gic: interrupt-controller@f1010000 {
2334 compatible = "arm,gic-400";
2335 #interrupt-cells = <3>;
2336 #address-cells = <0>;
2337 interrupt-controller;
2345 clock-names = "clk";
2346 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2351 compatible = "renesas,pcie-r8a774a1",
2352 "renesas,pcie-rcar-gen3";
2354 #address-cells = <3>;
2355 #size-cells = <2>;
2356 bus-range = <0x00 0xff>;
2363 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2367 #interrupt-cells = <1>;
2368 interrupt-map-mask = <0 0 0 0>;
2369 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2371 clock-names = "pcie", "pcie_bus";
2372 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2378 compatible = "renesas,pcie-r8a774a1",
2379 "renesas,pcie-rcar-gen3";
2381 #address-cells = <3>;
2382 #size-cells = <2>;
2383 bus-range = <0x00 0xff>;
2390 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2394 #interrupt-cells = <1>;
2395 interrupt-map-mask = <0 0 0 0>;
2396 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2398 clock-names = "pcie", "pcie_bus";
2399 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2404 pciec0_ep: pcie-ep@fe000000 {
2405 compatible = "renesas,r8a774a1-pcie-ep",
2406 "renesas,rcar-gen3-pcie-ep";
2412 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2417 clock-names = "pcie";
2419 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2423 pciec1_ep: pcie-ep@ee800000 {
2424 compatible = "renesas,r8a774a1-pcie-ep",
2425 "renesas,rcar-gen3-pcie-ep";
2431 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2436 clock-names = "pcie";
2438 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2447 power-domains = <&sysc R8A774A1_PD_A3VC>;
2456 power-domains = <&sysc R8A774A1_PD_A3VC>;
2464 power-domains = <&sysc R8A774A1_PD_A3VC>;
2472 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2481 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2490 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2499 power-domains = <&sysc R8A774A1_PD_A3VC>;
2509 power-domains = <&sysc R8A774A1_PD_A3VC>;
2520 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2531 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2542 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2553 power-domains = <&sysc R8A774A1_PD_A3VC>;
2560 compatible = "renesas,r8a774a1-csi2";
2564 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2569 #address-cells = <1>;
2570 #size-cells = <0>;
2577 #address-cells = <1>;
2578 #size-cells = <0>;
2584 remote-endpoint = <&vin0csi20>;
2588 remote-endpoint = <&vin1csi20>;
2592 remote-endpoint = <&vin2csi20>;
2596 remote-endpoint = <&vin3csi20>;
2600 remote-endpoint = <&vin4csi20>;
2604 remote-endpoint = <&vin5csi20>;
2608 remote-endpoint = <&vin6csi20>;
2612 remote-endpoint = <&vin7csi20>;
2619 compatible = "renesas,r8a774a1-csi2";
2623 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2628 #address-cells = <1>;
2629 #size-cells = <0>;
2636 #address-cells = <1>;
2637 #size-cells = <0>;
2643 remote-endpoint = <&vin0csi40>;
2647 remote-endpoint = <&vin1csi40>;
2651 remote-endpoint = <&vin2csi40>;
2655 remote-endpoint = <&vin3csi40>;
2659 remote-endpoint = <&vin4csi40>;
2663 remote-endpoint = <&vin5csi40>;
2667 remote-endpoint = <&vin6csi40>;
2671 remote-endpoint = <&vin7csi40>;
2679 compatible = "renesas,r8a774a1-hdmi",
2680 "renesas,rcar-gen3-hdmi";
2685 clock-names = "iahb", "isfr";
2686 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2691 #address-cells = <1>;
2692 #size-cells = <0>;
2696 remote-endpoint = <&du_out_hdmi0>;
2710 compatible = "renesas,du-r8a774a1";
2717 clock-names = "du.0", "du.1", "du.2";
2719 reset-names = "du.0", "du.2";
2725 #address-cells = <1>;
2726 #size-cells = <0>;
2734 remote-endpoint = <&dw_hdmi0_in>;
2740 remote-endpoint = <&lvds0_in>;
2747 compatible = "renesas,r8a774a1-lvds";
2750 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2755 #address-cells = <1>;
2756 #size-cells = <0>;
2761 remote-endpoint = <&du_out_lvds0>;
2776 thermal-zones {
2777 sensor1_thermal: sensor1-thermal {
2778 polling-delay-passive = <250>;
2779 polling-delay = <1000>;
2780 thermal-sensors = <&tsc 0>;
2781 sustainable-power = <3874>;
2784 sensor1_crit: sensor1-crit {
2792 sensor2_thermal: sensor2-thermal {
2793 polling-delay-passive = <250>;
2794 polling-delay = <1000>;
2795 thermal-sensors = <&tsc 1>;
2796 sustainable-power = <3874>;
2799 sensor2_crit: sensor2-crit {
2807 sensor3_thermal: sensor3-thermal {
2808 polling-delay-passive = <250>;
2809 polling-delay = <1000>;
2810 thermal-sensors = <&tsc 2>;
2811 sustainable-power = <3874>;
2813 cooling-maps {
2816 cooling-device = <&a57_0 0 2>;
2821 cooling-device = <&a53_0 0 2>;
2826 target: trip-point1 {
2832 sensor3_crit: sensor3-crit {
2842 compatible = "arm,armv8-timer";
2843 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2849 /* External USB clocks - can be overridden by the board */
2851 compatible = "fixed-clock";
2852 #clock-cells = <0>;
2853 clock-frequency = <0>;
2857 compatible = "fixed-clock";
2858 #clock-cells = <0>;
2859 clock-frequency = <0>;