Lines Matching +full:pvdd +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Condor board with R-Car V3H
8 #include <dt-bindings/gpio/gpio.h>
23 stdout-path = "serial0:115200n8";
26 d1_8v: regulator-2 {
27 compatible = "regulator-fixed";
28 regulator-name = "D1.8V";
29 regulator-min-microvolt = <1800000>;
30 regulator-max-microvolt = <1800000>;
31 regulator-boot-on;
32 regulator-always-on;
35 d3_3v: regulator-0 {
36 compatible = "regulator-fixed";
37 regulator-name = "D3.3V";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-boot-on;
41 regulator-always-on;
44 hdmi-out {
45 compatible = "hdmi-connector";
50 remote-endpoint = <&adv7511_out>;
55 lvds-decoder {
57 vcc-supply = <&d3_3v>;
60 #address-cells = <1>;
61 #size-cells = <0>;
66 remote-endpoint = <&lvds0_out>;
73 remote-endpoint = <&adv7511_in>;
85 vddq_vin01: regulator-1 {
86 compatible = "regulator-fixed";
87 regulator-name = "VDDQ_VIN01";
88 regulator-min-microvolt = <1800000>;
89 regulator-max-microvolt = <1800000>;
90 regulator-boot-on;
91 regulator-always-on;
94 x1_clk: x1-clock {
95 compatible = "fixed-clock";
96 #clock-cells = <0>;
97 clock-frequency = <148500000>;
102 pinctrl-0 = <&canfd0_pins>;
103 pinctrl-names = "default";
117 clock-lanes = <0>;
118 data-lanes = <1 2 3 4>;
119 remote-endpoint = <&max9286_out0>;
131 clock-lanes = <0>;
132 data-lanes = <1 2 3 4>;
133 remote-endpoint = <&max9286_out1>;
142 clock-names = "du.0", "dclkin.0";
147 clock-frequency = <16666666>;
151 clock-frequency = <32768>;
155 pinctrl-0 = <&gether_pins>;
156 pinctrl-names = "default";
158 phy-mode = "rgmii-id";
159 phy-handle = <&phy0>;
160 renesas,no-ether-link;
163 phy0: ethernet-phy@0 {
164 compatible = "ethernet-phy-id0022.1622",
165 "ethernet-phy-ieee802.3-c22";
166 rxc-skew-ps = <1500>;
168 interrupt-parent = <&gpio4>;
170 reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
175 pinctrl-0 = <&i2c0_pins>;
176 pinctrl-names = "default";
179 clock-frequency = <400000>;
184 gpio-controller;
185 #gpio-cells = <2>;
191 gpio-controller;
192 #gpio-cells = <2>;
198 interrupt-parent = <&gpio1>;
200 avdd-supply = <&d1_8v>;
201 dvdd-supply = <&d1_8v>;
202 pvdd-supply = <&d1_8v>;
203 bgvdd-supply = <&d1_8v>;
204 dvdd-3v-supply = <&d3_3v>;
206 adi,input-depth = <8>;
207 adi,input-colorspace = "rgb";
208 adi,input-clock = "1x";
211 #address-cells = <1>;
212 #size-cells = <0>;
217 remote-endpoint = <&thc63lvd1024_out>;
224 remote-endpoint = <&hdmi_con>;
232 pinctrl-0 = <&i2c1_pins>;
233 pinctrl-names = "default";
236 clock-frequency = <400000>;
238 gmsl0: gmsl-deserializer@48 {
242 maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
243 enable-gpios = <&io_expander0 0 GPIO_ACTIVE_HIGH>;
246 #address-cells = <1>;
247 #size-cells = <0>;
268 clock-lanes = <0>;
269 data-lanes = <1 2 3 4>;
270 remote-endpoint = <&csi40_in>;
275 i2c-mux {
276 #address-cells = <1>;
277 #size-cells = <0>;
280 #address-cells = <1>;
281 #size-cells = <0>;
288 #address-cells = <1>;
289 #size-cells = <0>;
296 #address-cells = <1>;
297 #size-cells = <0>;
304 #address-cells = <1>;
305 #size-cells = <0>;
313 gmsl1: gmsl-deserializer@4a {
317 maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
318 enable-gpios = <&io_expander1 0 GPIO_ACTIVE_HIGH>;
321 #address-cells = <1>;
322 #size-cells = <0>;
343 clock-lanes = <0>;
344 data-lanes = <1 2 3 4>;
345 remote-endpoint = <&csi41_in>;
350 i2c-mux {
351 #address-cells = <1>;
352 #size-cells = <0>;
355 #address-cells = <1>;
356 #size-cells = <0>;
363 #address-cells = <1>;
364 #size-cells = <0>;
371 #address-cells = <1>;
372 #size-cells = <0>;
379 #address-cells = <1>;
380 #size-cells = <0>;
395 remote-endpoint = <&thc63lvd1024_in>;
402 pinctrl-0 = <&mmc_pins>;
403 pinctrl-1 = <&mmc_pins>;
404 pinctrl-names = "default", "state_uhs";
406 vmmc-supply = <&d3_3v>;
407 vqmmc-supply = <&vddq_vin01>;
408 mmc-hs200-1_8v;
409 bus-width = <8>;
410 no-sd;
411 no-sdio;
412 non-removable;
421 clock-frequency = <100000000>;
453 power-source = <1800>;
473 pinctrl-0 = <&qspi0_pins>;
474 pinctrl-names = "default";
479 compatible = "spansion,s25fs512s", "jedec,spi-nor";
481 spi-max-frequency = <50000000>;
482 spi-rx-bus-width = <4>;
485 compatible = "fixed-partitions";
486 #address-cells = <1>;
487 #size-cells = <1>;
491 read-only;
495 read-only;
499 read-only;
503 read-only;
507 read-only;
511 read-only;
515 read-only;
517 uboot-env@700000 {
519 read-only;
535 timeout-sec = <60>;
540 pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
541 pinctrl-names = "default";
547 clock-frequency = <14745600>;