Lines Matching +full:1 +full:c0e000
119 qcom,freq-domain = <&cpufreq_hw 1>;
135 qcom,freq-domain = <&cpufreq_hw 1>;
152 qcom,freq-domain = <&cpufreq_hw 1>;
225 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
247 CLUSTER_SLEEP_1: cluster-sleep-1 {
263 #reset-cells = <1>;
273 mc_virt: interconnect-1 {
513 qcom,client-id = <1>;
616 #qcom,smem-state-cells = <1>;
640 #qcom,smem-state-cells = <1>;
660 qcom,remote-pid = <1>;
664 #qcom,smem-state-cells = <1>;
675 #qcom,smem-state-cells = <1>;
699 #qcom,smem-state-cells = <1>;
719 #clock-cells = <1>;
720 #reset-cells = <1>;
721 #power-domain-cells = <1>;
774 #address-cells = <1>;
781 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
799 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
801 #address-cells = <1>;
814 #address-cells = <1>;
820 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
821 <&gpi_dma2 1 1 QCOM_GPI_I2C>;
838 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
839 <&gpi_dma2 1 1 QCOM_GPI_SPI>;
841 #address-cells = <1>;
854 #address-cells = <1>;
861 <&gpi_dma2 1 2 QCOM_GPI_I2C>;
879 <&gpi_dma2 1 2 QCOM_GPI_SPI>;
881 #address-cells = <1>;
894 #address-cells = <1>;
901 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
919 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
921 #address-cells = <1>;
934 #address-cells = <1>;
941 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
959 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
961 #address-cells = <1>;
974 #address-cells = <1>;
981 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
994 #address-cells = <1>;
1012 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1014 #address-cells = <1>;
1027 #address-cells = <1>;
1034 <&gpi_dma2 1 6 QCOM_GPI_I2C>;
1052 <&gpi_dma2 1 6 QCOM_GPI_SPI>;
1054 #address-cells = <1>;
1104 #address-cells = <1>;
1111 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1131 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1133 #address-cells = <1>;
1146 #address-cells = <1>;
1152 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1153 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1170 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1171 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1173 #address-cells = <1>;
1186 #address-cells = <1>;
1193 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1211 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1213 #address-cells = <1>;
1227 #address-cells = <1>;
1234 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1252 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1254 #address-cells = <1>;
1267 #address-cells = <1>;
1274 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1294 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1296 #address-cells = <1>;
1309 #address-cells = <1>;
1316 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1334 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1336 #address-cells = <1>;
1350 #address-cells = <1>;
1357 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1375 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1377 #address-cells = <1>;
1390 #address-cells = <1>;
1440 #address-cells = <1>;
1447 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1465 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1467 #address-cells = <1>;
1480 #address-cells = <1>;
1486 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1487 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1504 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1505 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1507 #address-cells = <1>;
1520 #address-cells = <1>;
1527 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1545 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1547 #address-cells = <1>;
1560 #address-cells = <1>;
1567 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1585 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1587 #address-cells = <1>;
1600 #address-cells = <1>;
1607 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1625 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1627 #address-cells = <1>;
1645 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
1647 #address-cells = <1>;
1665 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
1667 #address-cells = <1>;
1685 <&gpi_dma1 1 6 QCOM_GPI_I2C>;
1687 #address-cells = <1>;
1705 <&gpi_dma1 1 6 QCOM_GPI_SPI>;
1707 #address-cells = <1>;
1713 pcie0: pci@1c00000 {
1724 num-lanes = <1>;
1734 #interrupt-cells = <1>;
1736 interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1788 pcie0_phy: phy@1c06000 {
1808 pcie0_lane: phy@1c06200 {
1822 pcie1: pci@1c08000 {
1831 linux,pci-domain = <1>;
1843 #interrupt-cells = <1>;
1845 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1895 pcie1_phy: phy@1c0f000 {
1915 pcie1_lane: phy@1c0e000 {
1979 tcsr_mutex: hwlock@1f40000 {
1982 #hwlock-cells = <1>;
2037 <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
2073 #address-cells = <1>;
2076 compute-cb@1 {
2078 reg = <1>;
2104 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
2140 #address-cells = <1>;
2170 <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
2206 #address-cells = <1>;
2209 compute-cb@1 {
2211 reg = <1>;
2276 <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>,
2306 qcom,remote-pid = <1>;
2319 #clock-cells = <1>;
2320 #reset-cells = <1>;
2321 #power-domain-cells = <1>;
2329 <94 609 31>, <125 63 1>, <126 716 12>;
2343 #thermal-sensor-cells = <1>;
2354 #thermal-sensor-cells = <1>;
2807 #global-interrupts = <1>;
2911 #redistributor-regions = <1>;
2924 #msi-cells = <1>;
2930 #address-cells = <1>;
2931 #size-cells = <1>;
2945 frame-number = <1>;
2994 reg-names = "drv-0", "drv-1", "drv-2", "drv-3";
3009 #clock-cells = <1>;
3016 #power-domain-cells = <1>;
3076 interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
3077 #freq-domain-cells = <1>;
3094 ufs_mem_hc: ufshc@1d84000 {
3104 #reset-cells = <1>;
3148 ufs_mem_phy: phy@1d87000 {
3163 ufs_mem_phy_lanes: phy@1d87400 {
3301 thermal-sensors = <&tsens0 1>;
3699 thermal-sensors = <&tsens1 1>;