Lines Matching +full:1 +full:b500000
47 ufs_phy_rx_symbol_1_clk: ufs-phy-rx-symbol-1 {
137 qcom,freq-domain = <&cpufreq_hw 1>;
153 qcom,freq-domain = <&cpufreq_hw 1>;
170 qcom,freq-domain = <&cpufreq_hw 1>;
245 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
272 #reset-cells = <1>;
454 pil_ipa_fw_mem: memory@8b500000 {
484 qcom,client-id = <1>;
539 #qcom,smem-state-cells = <1>;
563 #qcom,smem-state-cells = <1>;
583 qcom,remote-pid = <1>;
587 #qcom,smem-state-cells = <1>;
598 #qcom,smem-state-cells = <1>;
622 #qcom,smem-state-cells = <1>;
642 #clock-cells = <1>;
643 #reset-cells = <1>;
644 #power-domain-cells = <1>;
723 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
725 #address-cells = <1>;
739 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
741 #address-cells = <1>;
754 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
755 <&gpi_dma2 1 1 QCOM_GPI_I2C>;
757 #address-cells = <1>;
770 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
771 <&gpi_dma2 1 1 QCOM_GPI_SPI>;
773 #address-cells = <1>;
787 <&gpi_dma2 1 2 QCOM_GPI_I2C>;
789 #address-cells = <1>;
803 <&gpi_dma2 1 2 QCOM_GPI_SPI>;
805 #address-cells = <1>;
819 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
821 #address-cells = <1>;
835 <&gpi_dma2 1 3 QCOM_GPI_SPI>;
837 #address-cells = <1>;
853 <&gpi_dma2 1 4 QCOM_GPI_SPI>;
855 #address-cells = <1>;
882 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
884 #address-cells = <1>;
898 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
900 #address-cells = <1>;
949 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
951 #address-cells = <1>;
965 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
967 #address-cells = <1>;
980 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
981 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
983 #address-cells = <1>;
996 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
997 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
999 #address-cells = <1>;
1013 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1015 #address-cells = <1>;
1029 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1031 #address-cells = <1>;
1046 #address-cells = <1>;
1062 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1064 #address-cells = <1>;
1078 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1080 #address-cells = <1>;
1094 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1096 #address-cells = <1>;
1110 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1112 #address-cells = <1>;
1126 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1128 #address-cells = <1>;
1142 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1144 #address-cells = <1>;
1158 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1160 #address-cells = <1>;
1187 <&gpi_dma0 1 7 QCOM_GPI_I2C>;
1189 #address-cells = <1>;
1203 <&gpi_dma0 1 7 QCOM_GPI_SPI>;
1205 #address-cells = <1>;
1254 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1256 #address-cells = <1>;
1270 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1272 #address-cells = <1>;
1285 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1286 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1288 #address-cells = <1>;
1301 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1302 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1304 #address-cells = <1>;
1318 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1320 #address-cells = <1>;
1334 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1336 #address-cells = <1>;
1350 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1352 #address-cells = <1>;
1366 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1368 #address-cells = <1>;
1382 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1384 #address-cells = <1>;
1398 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1400 #address-cells = <1>;
1414 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
1416 #address-cells = <1>;
1430 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
1432 #address-cells = <1>;
1546 #interconnect-cells = <1>;
1553 #interconnect-cells = <1>;
1560 #interconnect-cells = <1>;
1567 #interconnect-cells = <1>;
1574 #interconnect-cells = <1>;
1581 #interconnect-cells = <1>;
1588 #interconnect-cells = <1>;
1595 #interconnect-cells = <1>;
1599 ipa: ipa@1e40000 {
1614 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
1631 <&ipa_smp2p_out 1>;
1638 tcsr_mutex: hwlock@1f40000 {
1641 #hwlock-cells = <1>;
1650 <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>,
1682 qcom,remote-pid = <1>;
1689 qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>,
1691 <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>,
1706 #thermal-sensor-cells = <1>;
1717 #thermal-sensor-cells = <1>;
1744 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
1927 #redistributor-regions = <1>;
1936 #address-cells = <1>;
1937 #size-cells = <1>;
1951 frame-number = <1>;
1999 reg-names = "drv-0", "drv-1", "drv-2";
2010 #clock-cells = <1>;
2017 #power-domain-cells = <1>;
2080 #freq-domain-cells = <1>;
2083 ufs_mem_hc: ufshc@1d84000 {
2091 #reset-cells = <1>;
2129 ufs_mem_phy: phy@1d87000 {
2144 ufs_mem_phy_lanes: phy@1d87400 {
2160 <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
2197 #address-cells = <1>;
2200 compute-cb@1 {
2202 reg = <1>;
2228 <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
2267 #address-cells = <1>;
2270 compute-cb@1 {
2272 reg = <1>;
2423 #interconnect-cells = <1>;
2430 #interconnect-cells = <1>;
2555 #clock-cells = <1>;
2556 #reset-cells = <1>;
2557 #power-domain-cells = <1>;
2569 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
2606 #address-cells = <1>;
2636 thermal-sensors = <&tsens0 1>;
3234 thermal-sensors = <&tsens1 1>;