Lines Matching +full:1 +full:c0e000
193 qcom,freq-domain = <&cpufreq_hw 1>;
214 qcom,freq-domain = <&cpufreq_hw 1>;
236 qcom,freq-domain = <&cpufreq_hw 1>;
317 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
635 #reset-cells = <1>;
844 #qcom,smem-state-cells = <1>;
868 #qcom,smem-state-cells = <1>;
892 #qcom,smem-state-cells = <1>;
912 #clock-cells = <1>;
913 #reset-cells = <1>;
914 #power-domain-cells = <1>;
980 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
982 #address-cells = <1>;
994 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
998 #address-cells = <1>;
1011 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
1012 <&gpi_dma2 1 1 QCOM_GPI_I2C>;
1014 #address-cells = <1>;
1025 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
1026 <&gpi_dma2 1 1 QCOM_GPI_SPI>;
1030 #address-cells = <1>;
1044 <&gpi_dma2 1 2 QCOM_GPI_I2C>;
1046 #address-cells = <1>;
1058 <&gpi_dma2 1 2 QCOM_GPI_SPI>;
1062 #address-cells = <1>;
1076 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
1078 #address-cells = <1>;
1090 <&gpi_dma2 1 3 QCOM_GPI_SPI>;
1094 #address-cells = <1>;
1121 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
1123 #address-cells = <1>;
1135 <&gpi_dma2 1 4 QCOM_GPI_SPI>;
1139 #address-cells = <1>;
1166 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
1168 #address-cells = <1>;
1180 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1184 #address-cells = <1>;
1234 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1236 #address-cells = <1>;
1248 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1252 #address-cells = <1>;
1265 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1266 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1268 #address-cells = <1>;
1279 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1280 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1284 #address-cells = <1>;
1298 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1300 #address-cells = <1>;
1312 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1316 #address-cells = <1>;
1343 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1345 #address-cells = <1>;
1357 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1361 #address-cells = <1>;
1375 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1377 #address-cells = <1>;
1389 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1393 #address-cells = <1>;
1407 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1409 #address-cells = <1>;
1421 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1425 #address-cells = <1>;
1439 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1441 #address-cells = <1>;
1453 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1457 #address-cells = <1>;
1484 <&gpi_dma0 1 7 QCOM_GPI_I2C>;
1486 #address-cells = <1>;
1498 <&gpi_dma0 1 7 QCOM_GPI_SPI>;
1502 #address-cells = <1>;
1549 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1551 #address-cells = <1>;
1563 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1567 #address-cells = <1>;
1580 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1581 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1583 #address-cells = <1>;
1594 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1595 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1599 #address-cells = <1>;
1613 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1615 #address-cells = <1>;
1627 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1631 #address-cells = <1>;
1645 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1647 #address-cells = <1>;
1659 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1663 #address-cells = <1>;
1677 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1679 #address-cells = <1>;
1691 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1695 #address-cells = <1>;
1722 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
1724 #address-cells = <1>;
1736 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
1740 #address-cells = <1>;
1749 #interconnect-cells = <1>;
1756 #interconnect-cells = <1>;
1763 #interconnect-cells = <1>;
1770 #interconnect-cells = <1>;
1777 #interconnect-cells = <1>;
1784 #interconnect-cells = <1>;
1791 #interconnect-cells = <1>;
1795 pcie0: pci@1c00000 {
1806 num-lanes = <1>;
1824 #interrupt-cells = <1>;
1826 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1869 pcie0_phy: phy@1c06000 {
1889 pcie0_lane: phy@1c06200 {
1904 pcie1: pci@1c08000 {
1913 linux,pci-domain = <1>;
1925 #interrupt-cells = <1>;
1927 interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1975 pcie1_phy: phy@1c0e000 {
1995 pcie1_lane: phy@1c0e200 {
2012 pcie2: pci@1c10000 {
2033 #interrupt-cells = <1>;
2035 interrupt-map = <0 0 0 1 &intc 0 290 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2083 pcie2_phy: phy@1c16000 {
2103 pcie2_lane: phy@1c16200 {
2120 ufs_mem_hc: ufshc@1d84000 {
2128 #reset-cells = <1>;
2167 ufs_mem_phy: phy@1d87000 {
2182 ufs_mem_phy_lanes: phy@1d87400 {
2192 ipa_virt: interconnect@1e00000 {
2195 #interconnect-cells = <1>;
2199 tcsr_mutex: hwlock@1f40000 {
2202 #hwlock-cells = <1>;
2220 #sound-dai-cells = <1>;
2241 #sound-dai-cells = <1>;
2249 #clock-cells = <1>;
2268 #sound-dai-cells = <1>;
2289 #sound-dai-cells = <1>;
2313 #sound-dai-cells = <1>;
2338 #sound-dai-cells = <1>;
2364 qcom,port-offset = <1>;
2365 #sound-dai-cells = <1>;
2373 #clock-cells = <1>;
2397 slew-rate = <1>;
2405 slew-rate = <1>;
2468 slew-rate = <1>;
2476 slew-rate = <1>;
2486 slew-rate = <1>;
2494 slew-rate = <1>;
2637 #clock-cells = <1>;
2638 #reset-cells = <1>;
2639 #power-domain-cells = <1>;
2671 <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
2708 #address-cells = <1>;
2711 compute-cb@1 {
2713 reg = <1>;
2739 <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
2774 #address-cells = <1>;
2777 compute-cb@1 {
2779 reg = <1>;
2900 #clock-cells = <1>;
2985 #interconnect-cells = <1>;
2992 #interconnect-cells = <1>;
2999 #interconnect-cells = <1>;
3181 #clock-cells = <1>;
3182 #reset-cells = <1>;
3183 #power-domain-cells = <1>;
3188 #address-cells = <1>;
3207 pinctrl-1 = <&cci0_sleep>;
3215 #address-cells = <1>;
3219 cci0_i2c1: i2c-bus@1 {
3220 reg = <1>;
3222 #address-cells = <1>;
3229 #address-cells = <1>;
3248 pinctrl-1 = <&cci1_sleep>;
3256 #address-cells = <1>;
3260 cci1_i2c1: i2c-bus@1 {
3261 reg = <1>;
3263 #address-cells = <1>;
3432 #clock-cells = <1>;
3433 #reset-cells = <1>;
3434 #power-domain-cells = <1>;
3456 #interrupt-cells = <1>;
3488 #address-cells = <1>;
3498 port@1 {
3499 reg = <1>;
3553 assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
3563 #address-cells = <1>;
3567 #address-cells = <1>;
3577 port@1 {
3578 reg = <1>;
3613 #clock-cells = <1>;
3645 assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
3655 #address-cells = <1>;
3659 #address-cells = <1>;
3669 port@1 {
3670 reg = <1>;
3686 #clock-cells = <1>;
3704 <&dsi0_phy 1>,
3706 <&dsi1_phy 1>,
3708 <&dp_phy 1>;
3716 #clock-cells = <1>;
3717 #reset-cells = <1>;
3718 #power-domain-cells = <1>;
3725 <125 63 1>, <126 716 12>;
3739 #thermal-sensor-cells = <1>;
3750 #thermal-sensor-cells = <1>;
3779 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
4755 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
4791 #address-cells = <1>;
4806 #address-cells = <1>;
4808 #sound-dai-cells = <1>;
4823 #address-cells = <1>;
4825 #sound-dai-cells = <1>;
4846 #address-cells = <1>;
4887 #address-cells = <1>;
4888 #size-cells = <1>;
4903 frame-number = <1>;
4951 reg-names = "drv-0", "drv-1", "drv-2";
4958 <WAKE_TCS 3>, <CONTROL_TCS 1>;
4962 #clock-cells = <1>;
4969 #power-domain-cells = <1>;
5029 #interconnect-cells = <1>;
5045 interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
5046 #freq-domain-cells = <1>;
5067 thermal-sensors = <&tsens0 1>;
5680 thermal-sensors = <&tsens1 1>;