Lines Matching +full:1 +full:c0e000
142 qcom,freq-domain = <&cpufreq_hw 1>;
163 qcom,freq-domain = <&cpufreq_hw 1>;
184 qcom,freq-domain = <&cpufreq_hw 1>;
267 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
584 #reset-cells = <1>;
698 qcom,client-id = <1>;
787 #qcom,smem-state-cells = <1>;
811 #qcom,smem-state-cells = <1>;
831 qcom,remote-pid = <1>;
835 #qcom,smem-state-cells = <1>;
859 #qcom,smem-state-cells = <1>;
880 #clock-cells = <1>;
881 #reset-cells = <1>;
882 #power-domain-cells = <1>;
957 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
962 #address-cells = <1>;
974 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
980 #address-cells = <1>;
990 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
991 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
996 #address-cells = <1>;
1007 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1008 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1014 #address-cells = <1>;
1025 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1030 #address-cells = <1>;
1042 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1048 #address-cells = <1>;
1059 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1064 #address-cells = <1>;
1076 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1082 #address-cells = <1>;
1093 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1098 #address-cells = <1>;
1110 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1116 #address-cells = <1>;
1127 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1132 #address-cells = <1>;
1144 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1150 #address-cells = <1>;
1161 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1166 #address-cells = <1>;
1178 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1184 #address-cells = <1>;
1195 <&gpi_dma0 1 7 QCOM_GPI_I2C>;
1200 #address-cells = <1>;
1212 <&gpi_dma0 1 7 QCOM_GPI_SPI>;
1218 #address-cells = <1>;
1265 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1270 #address-cells = <1>;
1282 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1288 #address-cells = <1>;
1298 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1299 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1304 #address-cells = <1>;
1315 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1316 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1322 #address-cells = <1>;
1333 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1338 #address-cells = <1>;
1350 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1356 #address-cells = <1>;
1367 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1372 #address-cells = <1>;
1384 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1390 #address-cells = <1>;
1410 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1415 #address-cells = <1>;
1427 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1433 #address-cells = <1>;
1444 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
1449 #address-cells = <1>;
1461 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1467 #address-cells = <1>;
1515 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
1520 #address-cells = <1>;
1532 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
1538 #address-cells = <1>;
1548 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
1549 <&gpi_dma2 1 1 QCOM_GPI_I2C>;
1554 #address-cells = <1>;
1565 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
1566 <&gpi_dma2 1 1 QCOM_GPI_SPI>;
1572 #address-cells = <1>;
1583 <&gpi_dma2 1 2 QCOM_GPI_I2C>;
1588 #address-cells = <1>;
1600 <&gpi_dma2 1 2 QCOM_GPI_SPI>;
1606 #address-cells = <1>;
1617 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
1622 #address-cells = <1>;
1634 <&gpi_dma2 1 3 QCOM_GPI_SPI>;
1640 #address-cells = <1>;
1651 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
1656 #address-cells = <1>;
1668 <&gpi_dma2 1 4 QCOM_GPI_SPI>;
1674 #address-cells = <1>;
1685 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
1690 #address-cells = <1>;
1702 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1708 #address-cells = <1>;
1717 #interconnect-cells = <1>;
1724 #interconnect-cells = <1>;
1731 #interconnect-cells = <1>;
1738 #interconnect-cells = <1>;
1745 #interconnect-cells = <1>;
1752 #interconnect-cells = <1>;
1759 #interconnect-cells = <1>;
1770 pcie0: pci@1c00000 {
1781 num-lanes = <1>;
1791 #interrupt-cells = <1>;
1793 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1834 pcie0_phy: phy@1c06000 {
1853 pcie0_lane: phy@1c06200 {
1866 pcie1: pci@1c08000 {
1875 linux,pci-domain = <1>;
1887 #interrupt-cells = <1>;
1889 interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1933 pcie1_phy: phy@1c0e000 {
1952 pcie1_lane: phy@1c0e200 {
1967 ufs_mem_hc: ufshc@1d84000 {
1977 #reset-cells = <1>;
2017 ufs_mem_phy: phy@1d87000 {
2034 ufs_mem_phy_lanes: phy@1d87400 {
2044 ipa_virt: interconnect@1e00000 {
2047 #interconnect-cells = <1>;
2051 tcsr_mutex: hwlock@1f40000 {
2054 #hwlock-cells = <1>;
2057 tcsr_regs_1: syscon@1f60000 {
2068 <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2101 #address-cells = <1>;
2104 compute-cb@1 {
2106 reg = <1>;
2237 #clock-cells = <1>;
2238 #reset-cells = <1>;
2239 #power-domain-cells = <1>;
2246 #global-interrupts = <1>;
2732 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2758 qcom,remote-pid = <1>;
2797 #address-cells = <1>;
2825 #address-cells = <1>;
2853 #address-cells = <1>;
2881 #address-cells = <1>;
2891 port@1 {
2892 reg = <1>;
2915 #address-cells = <1>;
2925 port@1 {
2926 reg = <1>;
2992 #address-cells = <1>;
2995 port@1 {
2996 reg = <1>;
3004 #address-cells = <1>;
3007 port@1 {
3008 reg = <1>;
3032 #address-cells = <1>;
3269 #address-cells = <1>;
3279 port@1 {
3280 reg = <1>;
3360 <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3391 #address-cells = <1>;
3394 compute-cb@1 {
3396 reg = <1>;
3586 #interconnect-cells = <1>;
3593 #interconnect-cells = <1>;
3698 #interconnect-cells = <1>;
3706 <125 63 1>;
3734 #thermal-sensor-cells = <1>;
3745 #thermal-sensor-cells = <1>;
3771 #global-interrupts = <1>;
3861 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3892 #address-cells = <1>;
3928 #mbox-cells = <1>;
3939 #address-cells = <1>;
3940 #size-cells = <1>;
3955 frame-number = <1>;
4003 reg-names = "drv-0", "drv-1", "drv-2";
4012 <CONTROL_TCS 1>;
4016 #clock-cells = <1>;
4023 #power-domain-cells = <1>;
4087 #interconnect-cells = <1>;
4100 #freq-domain-cells = <1>;
4112 #interrupt-cells = <1>;
4124 #interrupt-cells = <1>;
4153 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
4164 thermal-sensors = <&tsens0 1>;
4777 thermal-sensors = <&tsens1 1>;