Lines Matching +full:1 +full:ac00000

122 			qcom,client-id = <1>;
281 qcom,freq-domain = <&cpufreq_hw 1>;
303 qcom,freq-domain = <&cpufreq_hw 1>;
359 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
369 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
379 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
577 #qcom,smem-state-cells = <1>;
601 #qcom,smem-state-cells = <1>;
618 qcom,remote-pid = <1>;
622 #qcom,smem-state-cells = <1>;
633 #qcom,smem-state-cells = <1>;
662 #clock-cells = <1>;
663 #reset-cells = <1>;
664 #power-domain-cells = <1>;
676 #address-cells = <1>;
677 #size-cells = <1>;
681 bits = <1 3>;
684 gpu_speed_bin: gpu_speed_bin@1d2 {
715 mmc-ddr-1_8v;
716 mmc-hs200-1_8v;
717 mmc-hs400-1_8v;
780 #address-cells = <1>;
800 #address-cells = <1>;
834 #address-cells = <1>;
854 #address-cells = <1>;
888 #address-cells = <1>;
924 #address-cells = <1>;
944 #address-cells = <1>;
978 #address-cells = <1>;
1014 #address-cells = <1>;
1034 #address-cells = <1>;
1081 #address-cells = <1>;
1101 #address-cells = <1>;
1135 #address-cells = <1>;
1171 #address-cells = <1>;
1191 #address-cells = <1>;
1225 #address-cells = <1>;
1261 #address-cells = <1>;
1281 #address-cells = <1>;
1315 #address-cells = <1>;
1335 #address-cells = <1>;
1418 ipa: ipa@1e40000 {
1433 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
1452 <&ipa_smp2p_out 1>;
1459 tcsr_mutex: hwlock@1f40000 {
1462 #hwlock-cells = <1>;
1465 tcsr_regs_1: syscon@1f60000 {
1470 tcsr_regs_2: syscon@1fc0000 {
1903 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1943 qcom,remote-pid = <1>;
2030 #iommu-cells = <1>;
2087 #clock-cells = <1>;
2088 #reset-cells = <1>;
2089 #power-domain-cells = <1>;
2126 #address-cells = <1>;
2154 #address-cells = <1>;
2182 #address-cells = <1>;
2192 port@1 {
2193 reg = <1>;
2259 #address-cells = <1>;
2496 #address-cells = <1>;
2506 port@1 {
2507 reg = <1>;
2646 #address-cells = <1>;
2713 #clock-cells = <1>;
2863 #clock-cells = <1>;
2864 #reset-cells = <1>;
2865 #power-domain-cells = <1>;
2868 camnoc_virt: interconnect@ac00000 {
2882 #clock-cells = <1>;
2883 #reset-cells = <1>;
2884 #power-domain-cells = <1>;
2901 #interrupt-cells = <1>;
2943 #address-cells = <1>;
3009 assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
3017 #address-cells = <1>;
3023 #address-cells = <1>;
3033 port@1 {
3034 reg = <1>;
3069 #clock-cells = <1>;
3101 assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
3111 #address-cells = <1>;
3120 port@1 {
3121 reg = <1>;
3158 <&dsi_phy 1>,
3160 <&dp_phy 1>;
3167 #clock-cells = <1>;
3168 #reset-cells = <1>;
3169 #power-domain-cells = <1>;
3175 qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
3184 #reset-cells = <1>;
3195 #thermal-sensor-cells = <1>;
3206 #thermal-sensor-cells = <1>;
3212 #reset-cells = <1>;
3238 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3241 #address-cells = <1>;
3242 #size-cells = <1>;
3252 #address-cells = <1>;
3253 #size-cells = <1>;
3267 #global-interrupts = <1>;
3365 #msi-cells = <1>;
3374 #mbox-cells = <1>;
3385 #address-cells = <1>;
3386 #size-cells = <1>;
3400 frame-number = <1>;
3447 reg-names = "drv-0", "drv-1", "drv-2";
3456 <CONTROL_TCS 1>;
3462 #clock-cells = <1>;
3467 #power-domain-cells = <1>;
3531 #interconnect-cells = <1>;
3542 #freq-domain-cells = <1>;
3577 #clock-cells = <1>;
3578 #power-domain-cells = <1>;
3607 #sound-dai-cells = <1>;
3608 #address-cells = <1>;
3622 #clock-cells = <1>;
3623 #power-domain-cells = <1>;
3632 thermal-sensors = <&tsens0 1>;
4228 thermal-sensors = <&tsens1 1>;
4416 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,