Lines Matching +full:msm +full:- +full:uartdm +full:- +full:v1
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&intc>;
18 #address-cells = <2>;
19 #size-cells = <2>;
34 reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
39 tz-apps@86000000 {
41 no-map;
47 no-map;
50 qcom,rpm-msg-ram = <&rpm_msg_ram>;
55 no-map;
60 no-map;
65 no-map;
69 compatible = "qcom,rmtfs-mem";
71 no-map;
73 qcom,client-id = <1>;
78 no-map;
83 no-map;
88 no-map;
93 no-map;
97 no-map;
103 xo_board: xo-board {
104 compatible = "fixed-clock";
105 #clock-cells = <0>;
106 clock-frequency = <19200000>;
109 sleep_clk: sleep-clk {
110 compatible = "fixed-clock";
111 #clock-cells = <0>;
112 clock-frequency = <32768>;
117 #address-cells = <1>;
118 #size-cells = <0>;
122 compatible = "arm,cortex-a53";
124 next-level-cache = <&L2_0>;
125 enable-method = "psci";
127 operating-points-v2 = <&cpu_opp_table>;
128 #cooling-cells = <2>;
129 power-domains = <&CPU_PD0>;
130 power-domain-names = "psci";
137 compatible = "arm,cortex-a53";
139 next-level-cache = <&L2_0>;
140 enable-method = "psci";
142 operating-points-v2 = <&cpu_opp_table>;
143 #cooling-cells = <2>;
144 power-domains = <&CPU_PD1>;
145 power-domain-names = "psci";
152 compatible = "arm,cortex-a53";
154 next-level-cache = <&L2_0>;
155 enable-method = "psci";
157 operating-points-v2 = <&cpu_opp_table>;
158 #cooling-cells = <2>;
159 power-domains = <&CPU_PD2>;
160 power-domain-names = "psci";
167 compatible = "arm,cortex-a53";
169 next-level-cache = <&L2_0>;
170 enable-method = "psci";
172 operating-points-v2 = <&cpu_opp_table>;
173 #cooling-cells = <2>;
174 power-domains = <&CPU_PD3>;
175 power-domain-names = "psci";
180 L2_0: l2-cache {
182 cache-level = <2>;
185 idle-states {
186 entry-method = "psci";
188 CPU_SLEEP_0: cpu-sleep-0 {
189 compatible = "arm,idle-state";
190 idle-state-name = "standalone-power-collapse";
191 arm,psci-suspend-param = <0x40000002>;
192 entry-latency-us = <130>;
193 exit-latency-us = <150>;
194 min-residency-us = <2000>;
195 local-timer-stop;
199 domain-idle-states {
201 CLUSTER_RET: cluster-retention {
202 compatible = "domain-idle-state";
203 arm,psci-suspend-param = <0x41000012>;
204 entry-latency-us = <500>;
205 exit-latency-us = <500>;
206 min-residency-us = <2000>;
209 CLUSTER_PWRDN: cluster-gdhs {
210 compatible = "domain-idle-state";
211 arm,psci-suspend-param = <0x41000032>;
212 entry-latency-us = <2000>;
213 exit-latency-us = <2000>;
214 min-residency-us = <6000>;
219 cpu_opp_table: opp-table-cpu {
220 compatible = "operating-points-v2";
221 opp-shared;
223 opp-200000000 {
224 opp-hz = /bits/ 64 <200000000>;
226 opp-400000000 {
227 opp-hz = /bits/ 64 <400000000>;
229 opp-800000000 {
230 opp-hz = /bits/ 64 <800000000>;
232 opp-998400000 {
233 opp-hz = /bits/ 64 <998400000>;
239 compatible = "qcom,scm-msm8916", "qcom,scm";
243 clock-names = "core", "bus", "iface";
244 #reset-cells = <1>;
246 qcom,dload-mode = <&tcsr 0x6100>;
251 compatible = "arm,cortex-a53-pmu";
256 compatible = "arm,psci-1.0";
259 CPU_PD0: power-domain-cpu0 {
260 #power-domain-cells = <0>;
261 power-domains = <&CLUSTER_PD>;
262 domain-idle-states = <&CPU_SLEEP_0>;
265 CPU_PD1: power-domain-cpu1 {
266 #power-domain-cells = <0>;
267 power-domains = <&CLUSTER_PD>;
268 domain-idle-states = <&CPU_SLEEP_0>;
271 CPU_PD2: power-domain-cpu2 {
272 #power-domain-cells = <0>;
273 power-domains = <&CLUSTER_PD>;
274 domain-idle-states = <&CPU_SLEEP_0>;
277 CPU_PD3: power-domain-cpu3 {
278 #power-domain-cells = <0>;
279 power-domains = <&CLUSTER_PD>;
280 domain-idle-states = <&CPU_SLEEP_0>;
283 CLUSTER_PD: power-domain-cluster {
284 #power-domain-cells = <0>;
285 domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
295 qcom,smd-edge = <15>;
297 rpm_requests: rpm-requests {
298 compatible = "qcom,rpm-msm8916";
299 qcom,smd-channels = "rpm_requests";
301 rpmcc: clock-controller {
302 compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
303 #clock-cells = <1>;
305 clock-names = "xo";
308 rpmpd: power-controller {
309 compatible = "qcom,msm8916-rpmpd";
310 #power-domain-cells = <1>;
311 operating-points-v2 = <&rpmpd_opp_table>;
313 rpmpd_opp_table: opp-table {
314 compatible = "operating-points-v2";
317 opp-level = <1>;
320 opp-level = <2>;
323 opp-level = <3>;
326 opp-level = <4>;
329 opp-level = <5>;
332 opp-level = <6>;
340 smp2p-hexagon {
348 qcom,local-pid = <0>;
349 qcom,remote-pid = <1>;
351 hexagon_smp2p_out: master-kernel {
352 qcom,entry-name = "master-kernel";
354 #qcom,smem-state-cells = <1>;
357 hexagon_smp2p_in: slave-kernel {
358 qcom,entry-name = "slave-kernel";
360 interrupt-controller;
361 #interrupt-cells = <2>;
365 smp2p-wcnss {
373 qcom,local-pid = <0>;
374 qcom,remote-pid = <4>;
376 wcnss_smp2p_out: master-kernel {
377 qcom,entry-name = "master-kernel";
379 #qcom,smem-state-cells = <1>;
382 wcnss_smp2p_in: slave-kernel {
383 qcom,entry-name = "slave-kernel";
385 interrupt-controller;
386 #interrupt-cells = <2>;
393 #address-cells = <1>;
394 #size-cells = <0>;
396 qcom,ipc-1 = <&apcs 8 13>;
397 qcom,ipc-3 = <&apcs 8 19>;
402 #qcom,smem-state-cells = <1>;
409 interrupt-controller;
410 #interrupt-cells = <2>;
417 interrupt-controller;
418 #interrupt-cells = <2>;
423 #address-cells = <1>;
424 #size-cells = <1>;
426 compatible = "simple-bus";
432 clock-names = "core";
441 compatible = "qcom,msm8916-qfprom", "qcom,qfprom";
443 #address-cells = <1>;
444 #size-cells = <1>;
454 compatible = "qcom,rpm-msg-ram";
459 compatible = "qcom,msm8916-rpm-stats";
464 compatible = "qcom,msm8916-bimc";
466 #interconnect-cells = <1>;
467 clock-names = "bus", "bus_a";
472 tsens: thermal-sensor@4a9000 {
473 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
476 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
477 nvmem-cell-names = "calib", "calib_sel";
480 interrupt-names = "uplow";
481 #thermal-sensor-cells = <1>;
485 compatible = "qcom,msm8916-pcnoc";
487 #interconnect-cells = <1>;
488 clock-names = "bus", "bus_a";
494 compatible = "qcom,msm8916-snoc";
496 #interconnect-cells = <1>;
497 clock-names = "bus", "bus_a";
503 compatible = "arm,coresight-stm", "arm,primecell";
506 reg-names = "stm-base", "stm-stimulus-base";
509 clock-names = "apb_pclk", "atclk";
513 out-ports {
516 remote-endpoint = <&funnel0_in7>;
523 /* CTI 0 - TMC connections */
525 compatible = "arm,coresight-cti", "arm,primecell";
529 clock-names = "apb_pclk";
534 /* CTI 1 - TPIU connections */
536 compatible = "arm,coresight-cti", "arm,primecell";
540 clock-names = "apb_pclk";
545 /* CTIs 2-11 - no information - not instantiated */
548 compatible = "arm,coresight-tpiu", "arm,primecell";
552 clock-names = "apb_pclk", "atclk";
556 in-ports {
559 remote-endpoint = <&replicator_out1>;
566 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
570 clock-names = "apb_pclk", "atclk";
574 in-ports {
575 #address-cells = <1>;
576 #size-cells = <0>;
580 * 0 - connected to Resource and Power Manger CPU ETM
581 * 1 - not-connected
582 * 2 - connected to Modem CPU ETM
583 * 3 - not-connected
584 * 5 - not-connected
585 * 6 - connected trought funnel to Wireless CPU ETM
586 * 7 - connected to STM component
592 remote-endpoint = <&funnel1_out>;
599 remote-endpoint = <&stm_out>;
604 out-ports {
607 remote-endpoint = <&etf_in>;
614 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
618 clock-names = "apb_pclk", "atclk";
622 out-ports {
623 #address-cells = <1>;
624 #size-cells = <0>;
629 remote-endpoint = <&etr_in>;
635 remote-endpoint = <&tpiu_in>;
640 in-ports {
643 remote-endpoint = <&etf_out>;
650 compatible = "arm,coresight-tmc", "arm,primecell";
654 clock-names = "apb_pclk", "atclk";
658 in-ports {
661 remote-endpoint = <&funnel0_out>;
666 out-ports {
669 remote-endpoint = <&replicator_in>;
676 compatible = "arm,coresight-tmc", "arm,primecell";
680 clock-names = "apb_pclk", "atclk";
684 in-ports {
687 remote-endpoint = <&replicator_out0>;
694 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
698 clock-names = "apb_pclk", "atclk";
702 in-ports {
703 #address-cells = <1>;
704 #size-cells = <0>;
709 remote-endpoint = <&etm0_out>;
715 remote-endpoint = <&etm1_out>;
721 remote-endpoint = <&etm2_out>;
727 remote-endpoint = <&etm3_out>;
732 out-ports {
735 remote-endpoint = <&funnel0_in4>;
742 compatible = "arm,coresight-cpu-debug", "arm,primecell";
745 clock-names = "apb_pclk";
751 compatible = "arm,coresight-cpu-debug", "arm,primecell";
754 clock-names = "apb_pclk";
760 compatible = "arm,coresight-cpu-debug", "arm,primecell";
763 clock-names = "apb_pclk";
769 compatible = "arm,coresight-cpu-debug", "arm,primecell";
772 clock-names = "apb_pclk";
777 /* Core CTIs; CTIs 12-15 */
778 /* CTI - CPU-0 */
780 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
785 clock-names = "apb_pclk";
788 arm,cs-dev-assoc = <&etm0>;
793 /* CTI - CPU-1 */
795 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
800 clock-names = "apb_pclk";
803 arm,cs-dev-assoc = <&etm1>;
808 /* CTI - CPU-2 */
810 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
815 clock-names = "apb_pclk";
818 arm,cs-dev-assoc = <&etm2>;
823 /* CTI - CPU-3 */
825 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
830 clock-names = "apb_pclk";
833 arm,cs-dev-assoc = <&etm3>;
839 compatible = "arm,coresight-etm4x", "arm,primecell";
843 clock-names = "apb_pclk", "atclk";
844 arm,coresight-loses-context-with-cpu;
850 out-ports {
853 remote-endpoint = <&funnel1_in0>;
860 compatible = "arm,coresight-etm4x", "arm,primecell";
864 clock-names = "apb_pclk", "atclk";
865 arm,coresight-loses-context-with-cpu;
871 out-ports {
874 remote-endpoint = <&funnel1_in1>;
881 compatible = "arm,coresight-etm4x", "arm,primecell";
885 clock-names = "apb_pclk", "atclk";
886 arm,coresight-loses-context-with-cpu;
892 out-ports {
895 remote-endpoint = <&funnel1_in2>;
902 compatible = "arm,coresight-etm4x", "arm,primecell";
906 clock-names = "apb_pclk", "atclk";
907 arm,coresight-loses-context-with-cpu;
913 out-ports {
916 remote-endpoint = <&funnel1_in3>;
923 compatible = "qcom,msm8916-pinctrl";
926 gpio-controller;
927 gpio-ranges = <&msmgpio 0 0 122>;
928 #gpio-cells = <2>;
929 interrupt-controller;
930 #interrupt-cells = <2>;
933 gcc: clock-controller@1800000 {
934 compatible = "qcom,gcc-msm8916";
935 #clock-cells = <1>;
936 #reset-cells = <1>;
937 #power-domain-cells = <1>;
946 clock-names = "xo",
956 compatible = "qcom,tcsr-mutex";
958 #hwlock-cells = <1>;
962 compatible = "qcom,tcsr-msm8916", "syscon";
971 reg-names = "mdss_phys", "vbif_phys";
973 power-domains = <&gcc MDSS_GDSC>;
978 clock-names = "iface",
984 interrupt-controller;
985 #interrupt-cells = <1>;
987 #address-cells = <1>;
988 #size-cells = <1>;
994 reg-names = "mdp_phys";
996 interrupt-parent = <&mdss>;
1003 clock-names = "iface",
1011 #address-cells = <1>;
1012 #size-cells = <0>;
1017 remote-endpoint = <&dsi0_in>;
1024 compatible = "qcom,mdss-dsi-ctrl";
1026 reg-names = "dsi_ctrl";
1028 interrupt-parent = <&mdss>;
1031 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
1033 assigned-clock-parents = <&dsi_phy0 0>,
1042 clock-names = "mdp_core",
1049 phy-names = "dsi-phy";
1051 #address-cells = <1>;
1052 #size-cells = <0>;
1055 #address-cells = <1>;
1056 #size-cells = <0>;
1061 remote-endpoint = <&mdp5_intf1_out>;
1073 dsi_phy0: dsi-phy@1a98300 {
1074 compatible = "qcom,dsi-phy-28nm-lp";
1078 reg-names = "dsi_pll",
1082 #clock-cells = <1>;
1083 #phy-cells = <0>;
1087 clock-names = "iface", "ref";
1092 compatible = "qcom,msm8916-camss";
1102 reg-names = "csiphy0",
1117 interrupt-names = "csiphy0",
1123 power-domains = <&gcc VFE_GDSC>;
1143 clock-names = "top_ahb",
1165 #address-cells = <1>;
1166 #size-cells = <0>;
1171 compatible = "qcom,msm8916-cci";
1172 #address-cells = <1>;
1173 #size-cells = <0>;
1180 clock-names = "camss_top_ahb", "cci_ahb",
1182 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1184 assigned-clock-rates = <80000000>, <19200000>;
1185 pinctrl-names = "default";
1186 pinctrl-0 = <&cci0_default>;
1189 cci_i2c0: i2c-bus@0 {
1191 clock-frequency = <400000>;
1192 #address-cells = <1>;
1193 #size-cells = <0>;
1198 compatible = "qcom,adreno-306.0", "qcom,adreno";
1200 reg-names = "kgsl_3d0_reg_memory";
1202 interrupt-names = "kgsl_3d0_irq";
1203 clock-names =
1217 power-domains = <&gcc OXILI_GDSC>;
1218 operating-points-v2 = <&gpu_opp_table>;
1221 gpu_opp_table: opp-table {
1222 compatible = "operating-points-v2";
1224 opp-400000000 {
1225 opp-hz = /bits/ 64 <400000000>;
1227 opp-19200000 {
1228 opp-hz = /bits/ 64 <19200000>;
1233 venus: video-codec@1d00000 {
1234 compatible = "qcom,msm8916-venus";
1237 power-domains = <&gcc VENUS_GDSC>;
1241 clock-names = "core", "iface", "bus";
1243 memory-region = <&venus_mem>;
1246 video-decoder {
1247 compatible = "venus-decoder";
1250 video-encoder {
1251 compatible = "venus-encoder";
1256 #address-cells = <1>;
1257 #size-cells = <1>;
1258 #iommu-cells = <1>;
1259 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1264 clock-names = "iface", "bus";
1265 qcom,iommu-secure-id = <17>;
1268 iommu-ctx@3000 {
1269 compatible = "qcom,msm-iommu-v1-sec";
1275 iommu-ctx@4000 {
1276 compatible = "qcom,msm-iommu-v1-ns";
1282 iommu-ctx@5000 {
1283 compatible = "qcom,msm-iommu-v1-sec";
1290 #address-cells = <1>;
1291 #size-cells = <1>;
1292 #iommu-cells = <1>;
1293 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1297 clock-names = "iface", "bus";
1298 qcom,iommu-secure-id = <18>;
1301 iommu-ctx@1000 {
1302 compatible = "qcom,msm-iommu-v1-ns";
1308 iommu-ctx@2000 {
1309 compatible = "qcom,msm-iommu-v1-ns";
1316 compatible = "qcom,spmi-pmic-arb";
1322 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
1323 interrupt-names = "periph_irq";
1327 #address-cells = <2>;
1328 #size-cells = <0>;
1329 interrupt-controller;
1330 #interrupt-cells = <4>;
1333 bam_dmux_dma: dma-controller@4044000 {
1334 compatible = "qcom,bam-v1.7.0";
1337 #dma-cells = <1>;
1340 num-channels = <6>;
1341 qcom,num-ees = <1>;
1342 qcom,powered-remotely;
1348 compatible = "qcom,msm8916-mss-pil", "qcom,q6v5-pil";
1352 reg-names = "qdsp6", "rmb";
1354 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1359 interrupt-names = "wdog", "fatal", "ready",
1360 "handover", "stop-ack";
1362 power-domains = <&rpmpd MSM8916_VDDCX>,
1364 power-domain-names = "cx", "mx";
1370 clock-names = "iface", "bus", "mem", "xo";
1372 qcom,smem-states = <&hexagon_smp2p_out 0>;
1373 qcom,smem-state-names = "stop";
1376 reset-names = "mss_restart";
1378 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1383 memory-region = <&mba_mem>;
1387 memory-region = <&mpss_mem>;
1390 bam_dmux: bam-dmux {
1391 compatible = "qcom,bam-dmux";
1393 interrupt-parent = <&hexagon_smsm>;
1395 interrupt-names = "pc", "pc-ack";
1397 qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
1398 qcom,smem-state-names = "pc", "pc-ack";
1401 dma-names = "tx", "rx";
1406 smd-edge {
1409 qcom,smd-edge = <0>;
1411 qcom,remote-pid = <1>;
1417 qcom,smd-channels = "fastrpcsmd-apps-dsp";
1419 qcom,non-secure-domain;
1421 #address-cells = <1>;
1422 #size-cells = <0>;
1425 compatible = "qcom,fastrpc-compute-cb";
1434 compatible = "qcom,apq8016-sbc-sndcard";
1436 reg-names = "mic-iomux", "spkr-iomux";
1439 lpass: audio-controller@7708000 {
1441 compatible = "qcom,lpass-cpu-apq8016";
1456 clock-names = "ahbix-clk",
1457 "pcnoc-mport-clk",
1458 "pcnoc-sway-clk",
1459 "mi2s-bit-clk0",
1460 "mi2s-bit-clk1",
1461 "mi2s-bit-clk2",
1462 "mi2s-bit-clk3";
1463 #sound-dai-cells = <1>;
1466 interrupt-names = "lpass-irq-lpaif";
1468 reg-names = "lpass-lpaif";
1470 #address-cells = <1>;
1471 #size-cells = <0>;
1474 lpass_codec: audio-codec@771c000 {
1475 compatible = "qcom,msm8916-wcd-digital-codec";
1479 clock-names = "ahbix-clk", "mclk";
1480 #sound-dai-cells = <1>;
1484 compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
1486 reg-names = "hc", "core";
1490 interrupt-names = "hc_irq", "pwr_irq";
1494 clock-names = "iface", "core", "xo";
1495 mmc-ddr-1_8v;
1496 bus-width = <8>;
1497 non-removable;
1502 compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
1504 reg-names = "hc", "core";
1508 interrupt-names = "hc_irq", "pwr_irq";
1512 clock-names = "iface", "core", "xo";
1513 bus-width = <4>;
1517 blsp_dma: dma-controller@7884000 {
1518 compatible = "qcom,bam-v1.7.0";
1522 clock-names = "bam_clk";
1523 #dma-cells = <1>;
1529 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
1533 clock-names = "core", "iface";
1535 dma-names = "tx", "rx";
1536 pinctrl-names = "default", "sleep";
1537 pinctrl-0 = <&blsp1_uart1_default>;
1538 pinctrl-1 = <&blsp1_uart1_sleep>;
1543 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
1547 clock-names = "core", "iface";
1549 dma-names = "tx", "rx";
1550 pinctrl-names = "default", "sleep";
1551 pinctrl-0 = <&blsp1_uart2_default>;
1552 pinctrl-1 = <&blsp1_uart2_sleep>;
1557 compatible = "qcom,i2c-qup-v2.2.1";
1562 clock-names = "core", "iface";
1563 pinctrl-names = "default", "sleep";
1564 pinctrl-0 = <&i2c1_default>;
1565 pinctrl-1 = <&i2c1_sleep>;
1566 #address-cells = <1>;
1567 #size-cells = <0>;
1572 compatible = "qcom,spi-qup-v2.2.1";
1577 clock-names = "core", "iface";
1579 dma-names = "tx", "rx";
1580 pinctrl-names = "default", "sleep";
1581 pinctrl-0 = <&spi1_default>;
1582 pinctrl-1 = <&spi1_sleep>;
1583 #address-cells = <1>;
1584 #size-cells = <0>;
1589 compatible = "qcom,i2c-qup-v2.2.1";
1594 clock-names = "core", "iface";
1595 pinctrl-names = "default", "sleep";
1596 pinctrl-0 = <&i2c2_default>;
1597 pinctrl-1 = <&i2c2_sleep>;
1598 #address-cells = <1>;
1599 #size-cells = <0>;
1604 compatible = "qcom,spi-qup-v2.2.1";
1609 clock-names = "core", "iface";
1611 dma-names = "tx", "rx";
1612 pinctrl-names = "default", "sleep";
1613 pinctrl-0 = <&spi2_default>;
1614 pinctrl-1 = <&spi2_sleep>;
1615 #address-cells = <1>;
1616 #size-cells = <0>;
1621 compatible = "qcom,i2c-qup-v2.2.1";
1626 clock-names = "core", "iface";
1627 pinctrl-names = "default", "sleep";
1628 pinctrl-0 = <&i2c3_default>;
1629 pinctrl-1 = <&i2c3_sleep>;
1630 #address-cells = <1>;
1631 #size-cells = <0>;
1636 compatible = "qcom,spi-qup-v2.2.1";
1641 clock-names = "core", "iface";
1643 dma-names = "tx", "rx";
1644 pinctrl-names = "default", "sleep";
1645 pinctrl-0 = <&spi3_default>;
1646 pinctrl-1 = <&spi3_sleep>;
1647 #address-cells = <1>;
1648 #size-cells = <0>;
1653 compatible = "qcom,i2c-qup-v2.2.1";
1658 clock-names = "core", "iface";
1659 pinctrl-names = "default", "sleep";
1660 pinctrl-0 = <&i2c4_default>;
1661 pinctrl-1 = <&i2c4_sleep>;
1662 #address-cells = <1>;
1663 #size-cells = <0>;
1668 compatible = "qcom,spi-qup-v2.2.1";
1673 clock-names = "core", "iface";
1675 dma-names = "tx", "rx";
1676 pinctrl-names = "default", "sleep";
1677 pinctrl-0 = <&spi4_default>;
1678 pinctrl-1 = <&spi4_sleep>;
1679 #address-cells = <1>;
1680 #size-cells = <0>;
1685 compatible = "qcom,i2c-qup-v2.2.1";
1690 clock-names = "core", "iface";
1691 pinctrl-names = "default", "sleep";
1692 pinctrl-0 = <&i2c5_default>;
1693 pinctrl-1 = <&i2c5_sleep>;
1694 #address-cells = <1>;
1695 #size-cells = <0>;
1700 compatible = "qcom,spi-qup-v2.2.1";
1705 clock-names = "core", "iface";
1707 dma-names = "tx", "rx";
1708 pinctrl-names = "default", "sleep";
1709 pinctrl-0 = <&spi5_default>;
1710 pinctrl-1 = <&spi5_sleep>;
1711 #address-cells = <1>;
1712 #size-cells = <0>;
1717 compatible = "qcom,i2c-qup-v2.2.1";
1722 clock-names = "core", "iface";
1723 pinctrl-names = "default", "sleep";
1724 pinctrl-0 = <&i2c6_default>;
1725 pinctrl-1 = <&i2c6_sleep>;
1726 #address-cells = <1>;
1727 #size-cells = <0>;
1732 compatible = "qcom,spi-qup-v2.2.1";
1737 clock-names = "core", "iface";
1739 dma-names = "tx", "rx";
1740 pinctrl-names = "default", "sleep";
1741 pinctrl-0 = <&spi6_default>;
1742 pinctrl-1 = <&spi6_sleep>;
1743 #address-cells = <1>;
1744 #size-cells = <0>;
1749 compatible = "qcom,ci-hdrc";
1756 clock-names = "iface", "core";
1757 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
1758 assigned-clock-rates = <80000000>;
1760 reset-names = "core";
1763 hnp-disable;
1764 srp-disable;
1765 adp-disable;
1766 ahb-burst-config = <0>;
1767 phy-names = "usb-phy";
1770 #reset-cells = <1>;
1774 compatible = "qcom,usb-hs-phy-msm8916",
1775 "qcom,usb-hs-phy";
1776 #phy-cells = <0>;
1778 clock-names = "ref", "sleep";
1780 reset-names = "phy", "por";
1781 qcom,init-seq = /bits/ 8 <0x0 0x44>,
1790 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
1792 reg-names = "ccu", "dxe", "pmu";
1794 memory-region = <&wcnss_mem>;
1796 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
1801 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
1803 power-domains = <&rpmpd MSM8916_VDDCX>,
1805 power-domain-names = "cx", "mx";
1807 qcom,smem-states = <&wcnss_smp2p_out 0>;
1808 qcom,smem-state-names = "stop";
1810 pinctrl-names = "default";
1811 pinctrl-0 = <&wcnss_pin_a>;
1819 clock-names = "xo";
1822 smd-edge {
1826 qcom,smd-edge = <6>;
1827 qcom,remote-pid = <4>;
1833 qcom,smd-channels = "WCNSS_CTRL";
1838 compatible = "qcom,wcnss-bt";
1842 compatible = "qcom,wcnss-wlan";
1846 interrupt-names = "tx", "rx";
1848 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
1849 qcom,smem-state-names = "tx-enable", "tx-rings-empty";
1855 intc: interrupt-controller@b000000 {
1856 compatible = "qcom,msm-qgic2";
1857 interrupt-controller;
1858 #interrupt-cells = <3>;
1865 compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
1867 #mbox-cells = <1>;
1869 clock-names = "pll", "aux";
1870 #clock-cells = <0>;
1874 compatible = "qcom,msm8916-a53pll";
1876 #clock-cells = <0>;
1878 clock-names = "xo";
1882 #address-cells = <1>;
1883 #size-cells = <1>;
1885 compatible = "arm,armv7-timer-mem";
1887 clock-frequency = <19200000>;
1890 frame-number = <0>;
1898 frame-number = <1>;
1905 frame-number = <2>;
1912 frame-number = <3>;
1919 frame-number = <4>;
1926 frame-number = <5>;
1933 frame-number = <6>;
1940 cpu0_acc: power-manager@b088000 {
1941 compatible = "qcom,msm8916-acc";
1946 cpu0_saw: power-manager@b089000 {
1947 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
1952 cpu1_acc: power-manager@b098000 {
1953 compatible = "qcom,msm8916-acc";
1958 cpu1_saw: power-manager@b099000 {
1959 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
1964 cpu2_acc: power-manager@b0a8000 {
1965 compatible = "qcom,msm8916-acc";
1970 cpu2_saw: power-manager@b0a9000 {
1971 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
1976 cpu3_acc: power-manager@b0b8000 {
1977 compatible = "qcom,msm8916-acc";
1982 cpu3_saw: power-manager@b0b9000 {
1983 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
1989 thermal-zones {
1990 cpu0-1-thermal {
1991 polling-delay-passive = <250>;
1992 polling-delay = <1000>;
1994 thermal-sensors = <&tsens 5>;
1997 cpu0_1_alert0: trip-point0 {
2009 cooling-maps {
2012 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2020 cpu2-3-thermal {
2021 polling-delay-passive = <250>;
2022 polling-delay = <1000>;
2024 thermal-sensors = <&tsens 4>;
2027 cpu2_3_alert0: trip-point0 {
2039 cooling-maps {
2042 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2050 gpu-thermal {
2051 polling-delay-passive = <250>;
2052 polling-delay = <1000>;
2054 thermal-sensors = <&tsens 2>;
2057 gpu_alert0: trip-point0 {
2070 camera-thermal {
2071 polling-delay-passive = <250>;
2072 polling-delay = <1000>;
2074 thermal-sensors = <&tsens 1>;
2077 cam_alert0: trip-point0 {
2085 modem-thermal {
2086 polling-delay-passive = <250>;
2087 polling-delay = <1000>;
2089 thermal-sensors = <&tsens 0>;
2092 modem_alert0: trip-point0 {
2103 compatible = "arm,armv8-timer";
2111 #include "msm8916-pins.dtsi"