Lines Matching full:gcc
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
240 clocks = <&gcc GCC_CRYPTO_CLK>,
241 <&gcc GCC_CRYPTO_AXI_CLK>,
242 <&gcc GCC_CRYPTO_AHB_CLK>;
431 clocks = <&gcc GCC_PRNG_AHB_CLK>;
933 gcc: clock-controller@1800000 { label
934 compatible = "qcom,gcc-msm8916";
973 power-domains = <&gcc MDSS_GDSC>;
975 clocks = <&gcc GCC_MDSS_AHB_CLK>,
976 <&gcc GCC_MDSS_AXI_CLK>,
977 <&gcc GCC_MDSS_VSYNC_CLK>;
999 clocks = <&gcc GCC_MDSS_AHB_CLK>,
1000 <&gcc GCC_MDSS_AXI_CLK>,
1001 <&gcc GCC_MDSS_MDP_CLK>,
1002 <&gcc GCC_MDSS_VSYNC_CLK>;
1031 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
1032 <&gcc PCLK0_CLK_SRC>;
1036 clocks = <&gcc GCC_MDSS_MDP_CLK>,
1037 <&gcc GCC_MDSS_AHB_CLK>,
1038 <&gcc GCC_MDSS_AXI_CLK>,
1039 <&gcc GCC_MDSS_BYTE0_CLK>,
1040 <&gcc GCC_MDSS_PCLK0_CLK>,
1041 <&gcc GCC_MDSS_ESC0_CLK>;
1085 clocks = <&gcc GCC_MDSS_AHB_CLK>,
1123 power-domains = <&gcc VFE_GDSC>;
1124 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
1125 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
1126 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
1127 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
1128 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
1129 <&gcc GCC_CAMSS_CSI0_CLK>,
1130 <&gcc GCC_CAMSS_CSI0PHY_CLK>,
1131 <&gcc GCC_CAMSS_CSI0PIX_CLK>,
1132 <&gcc GCC_CAMSS_CSI0RDI_CLK>,
1133 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
1134 <&gcc GCC_CAMSS_CSI1_CLK>,
1135 <&gcc GCC_CAMSS_CSI1PHY_CLK>,
1136 <&gcc GCC_CAMSS_CSI1PIX_CLK>,
1137 <&gcc GCC_CAMSS_CSI1RDI_CLK>,
1138 <&gcc GCC_CAMSS_AHB_CLK>,
1139 <&gcc GCC_CAMSS_VFE0_CLK>,
1140 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
1141 <&gcc GCC_CAMSS_VFE_AHB_CLK>,
1142 <&gcc GCC_CAMSS_VFE_AXI_CLK>;
1176 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
1177 <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1178 <&gcc GCC_CAMSS_CCI_CLK>,
1179 <&gcc GCC_CAMSS_AHB_CLK>;
1182 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1183 <&gcc GCC_CAMSS_CCI_CLK>;
1211 <&gcc GCC_OXILI_GFX3D_CLK>,
1212 <&gcc GCC_OXILI_AHB_CLK>,
1213 <&gcc GCC_OXILI_GMEM_CLK>,
1214 <&gcc GCC_BIMC_GFX_CLK>,
1215 <&gcc GCC_BIMC_GPU_CLK>,
1216 <&gcc GFX3D_CLK_SRC>;
1217 power-domains = <&gcc OXILI_GDSC>;
1237 power-domains = <&gcc VENUS_GDSC>;
1238 clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
1239 <&gcc GCC_VENUS0_AHB_CLK>,
1240 <&gcc GCC_VENUS0_AXI_CLK>;
1262 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1263 <&gcc GCC_APSS_TCU_CLK>;
1295 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1296 <&gcc GCC_GFX_TCU_CLK>;
1366 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
1367 <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
1368 <&gcc GCC_BOOT_ROM_AHB_CLK>,
1448 clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
1449 <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
1450 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
1451 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
1452 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
1453 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
1454 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
1477 clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
1478 <&gcc GCC_CODEC_DIGCODEC_CLK>;
1491 clocks = <&gcc GCC_SDCC1_AHB_CLK>,
1492 <&gcc GCC_SDCC1_APPS_CLK>,
1509 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
1510 <&gcc GCC_SDCC2_APPS_CLK>,
1521 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
1532 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
1546 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
1560 clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
1561 <&gcc GCC_BLSP1_AHB_CLK>;
1575 clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
1576 <&gcc GCC_BLSP1_AHB_CLK>;
1592 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
1593 <&gcc GCC_BLSP1_AHB_CLK>;
1607 clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
1608 <&gcc GCC_BLSP1_AHB_CLK>;
1624 clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
1625 <&gcc GCC_BLSP1_AHB_CLK>;
1639 clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
1640 <&gcc GCC_BLSP1_AHB_CLK>;
1656 clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
1657 <&gcc GCC_BLSP1_AHB_CLK>;
1671 clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
1672 <&gcc GCC_BLSP1_AHB_CLK>;
1688 clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
1689 <&gcc GCC_BLSP1_AHB_CLK>;
1703 clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
1704 <&gcc GCC_BLSP1_AHB_CLK>;
1720 clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
1721 <&gcc GCC_BLSP1_AHB_CLK>;
1735 clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
1736 <&gcc GCC_BLSP1_AHB_CLK>;
1754 clocks = <&gcc GCC_USB_HS_AHB_CLK>,
1755 <&gcc GCC_USB_HS_SYSTEM_CLK>;
1757 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
1759 resets = <&gcc GCC_USB_HS_BCR>;
1777 clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
1779 resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
1868 clocks = <&a53pll>, <&gcc GPLL0_VOTE>;