Lines Matching +full:ipq4019 +full:- +full:nand
1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
15 interrupt-parent = <&intc>;
19 compatible = "fixed-clock";
20 clock-frequency = <32768>;
21 #clock-cells = <0>;
25 compatible = "fixed-clock";
26 clock-frequency = <19200000>;
27 #clock-cells = <0>;
32 #address-cells = <0x1>;
33 #size-cells = <0x0>;
37 compatible = "arm,cortex-a53";
39 next-level-cache = <&L2_0>;
40 enable-method = "psci";
45 compatible = "arm,cortex-a53";
46 enable-method = "psci";
48 next-level-cache = <&L2_0>;
53 compatible = "arm,cortex-a53";
54 enable-method = "psci";
56 next-level-cache = <&L2_0>;
61 compatible = "arm,cortex-a53";
62 enable-method = "psci";
64 next-level-cache = <&L2_0>;
67 L2_0: l2-cache {
69 cache-level = <0x2>;
74 compatible = "arm,cortex-a53-pmu";
79 compatible = "arm,psci-1.0";
83 reserved-memory {
84 #address-cells = <2>;
85 #size-cells = <2>;
91 no-map;
97 no-map;
104 compatible = "qcom,scm-ipq8074", "qcom,scm";
109 #address-cells = <0x1>;
110 #size-cells = <0x1>;
112 compatible = "simple-bus";
115 compatible = "qcom,ipq8074-qmp-usb3-phy";
117 #address-cells = <1>;
118 #size-cells = <1>;
124 clock-names = "aux", "cfg_ahb", "ref";
128 reset-names = "phy","common";
136 #phy-cells = <0>;
137 #clock-cells = <0>;
139 clock-names = "pipe0";
140 clock-output-names = "gcc_usb1_pipe_clk_src";
145 compatible = "qcom,ipq8074-qusb2-phy";
147 #phy-cells = <0>;
151 clock-names = "cfg_ahb", "ref";
158 compatible = "qcom,ipq8074-qmp-usb3-phy";
160 #address-cells = <1>;
161 #size-cells = <1>;
167 clock-names = "aux", "cfg_ahb", "ref";
171 reset-names = "phy","common";
179 #phy-cells = <0>;
180 #clock-cells = <0>;
182 clock-names = "pipe0";
183 clock-output-names = "gcc_usb0_pipe_clk_src";
188 compatible = "qcom,ipq8074-qusb2-phy";
190 #phy-cells = <0>;
194 clock-names = "cfg_ahb", "ref";
201 compatible = "qcom,ipq8074-qmp-pcie-phy";
203 #address-cells = <1>;
204 #size-cells = <1>;
209 clock-names = "aux", "cfg_ahb";
212 reset-names = "phy",
220 #phy-cells = <0>;
221 #clock-cells = <0>;
223 clock-names = "pipe0";
224 clock-output-names = "pcie_0_pipe_clk";
229 compatible = "qcom,ipq8074-qmp-pcie-phy";
231 #address-cells = <1>;
232 #size-cells = <1>;
237 clock-names = "aux", "cfg_ahb";
240 reset-names = "phy",
248 #phy-cells = <0>;
249 #clock-cells = <0>;
251 clock-names = "pipe0";
252 clock-output-names = "pcie_1_pipe_clk";
257 compatible = "qcom,ipq4019-mdio";
259 #address-cells = <1>;
260 #size-cells = <0>;
263 clock-names = "gcc_mdio_ahb_clk";
269 compatible = "qcom,prng-ee";
272 clock-names = "core";
276 cryptobam: dma-controller@704000 {
277 compatible = "qcom,bam-v1.7.0";
281 clock-names = "bam_clk";
282 #dma-cells = <1>;
284 qcom,controlled-remotely;
289 compatible = "qcom,crypto-v5.1";
294 clock-names = "iface", "bus", "core";
296 dma-names = "rx", "tx";
301 compatible = "qcom,ipq8074-pinctrl";
304 gpio-controller;
305 gpio-ranges = <&tlmm 0 0 70>;
306 #gpio-cells = <0x2>;
307 interrupt-controller;
308 #interrupt-cells = <0x2>;
310 serial_4_pins: serial4-pinmux {
313 drive-strength = <8>;
314 bias-disable;
317 i2c_0_pins: i2c-0-pinmux {
320 drive-strength = <8>;
321 bias-disable;
324 spi_0_pins: spi-0-pins {
327 drive-strength = <8>;
328 bias-disable;
331 hsuart_pins: hsuart-pins {
334 drive-strength = <8>;
335 bias-disable;
338 qpic_pins: qpic-pins {
345 drive-strength = <8>;
346 bias-disable;
351 compatible = "qcom,gcc-ipq8074";
353 #clock-cells = <0x1>;
354 #power-domain-cells = <1>;
355 #reset-cells = <0x1>;
359 compatible = "qcom,tcsr-mutex";
361 #hwlock-cells = <1>;
365 compatible = "qcom,spmi-pmic-arb";
371 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
373 interrupt-names = "periph_irq";
376 #address-cells = <2>;
377 #size-cells = <0>;
378 interrupt-controller;
379 #interrupt-cells = <4>;
380 cell-index = <0>;
384 compatible = "qcom,sdhci-msm-v4";
386 reg-names = "hc", "core";
390 interrupt-names = "hc_irq", "pwr_irq";
395 clock-names = "iface", "core", "xo";
397 max-frequency = <384000000>;
398 mmc-ddr-1_8v;
399 mmc-hs200-1_8v;
400 mmc-hs400-1_8v;
401 bus-width = <8>;
406 blsp_dma: dma-controller@7884000 {
407 compatible = "qcom,bam-v1.7.0";
411 clock-names = "bam_clk";
412 #dma-cells = <1>;
417 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
422 clock-names = "core", "iface";
427 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
432 clock-names = "core", "iface";
435 dma-names = "tx", "rx";
436 pinctrl-0 = <&hsuart_pins>;
437 pinctrl-names = "default";
442 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
447 clock-names = "core", "iface";
448 pinctrl-0 = <&serial_4_pins>;
449 pinctrl-names = "default";
454 compatible = "qcom,spi-qup-v2.2.1";
455 #address-cells = <1>;
456 #size-cells = <0>;
459 spi-max-frequency = <50000000>;
462 clock-names = "core", "iface";
464 dma-names = "tx", "rx";
465 pinctrl-0 = <&spi_0_pins>;
466 pinctrl-names = "default";
471 compatible = "qcom,i2c-qup-v2.2.1";
472 #address-cells = <1>;
473 #size-cells = <0>;
478 clock-names = "core", "iface";
479 clock-frequency = <400000>;
481 dma-names = "tx", "rx";
482 pinctrl-0 = <&i2c_0_pins>;
483 pinctrl-names = "default";
488 compatible = "qcom,i2c-qup-v2.2.1";
489 #address-cells = <1>;
490 #size-cells = <0>;
495 clock-names = "core", "iface";
496 clock-frequency = <100000>;
498 dma-names = "tx", "rx";
503 compatible = "qcom,i2c-qup-v2.2.1";
504 #address-cells = <1>;
505 #size-cells = <0>;
510 clock-names = "core", "iface";
511 clock-frequency = <400000>;
513 dma-names = "tx", "rx";
518 compatible = "qcom,i2c-qup-v2.2.1";
519 #address-cells = <1>;
520 #size-cells = <0>;
525 clock-names = "core", "iface";
526 clock-frequency = <100000>;
528 dma-names = "tx", "rx";
532 qpic_bam: dma-controller@7984000 {
533 compatible = "qcom,bam-v1.7.0";
537 clock-names = "bam_clk";
538 #dma-cells = <1>;
543 qpic_nand: nand-controller@79b0000 {
544 compatible = "qcom,ipq8074-nand";
546 #address-cells = <1>;
547 #size-cells = <0>;
550 clock-names = "core", "aon";
555 dma-names = "tx", "rx", "cmd";
556 pinctrl-0 = <&qpic_pins>;
557 pinctrl-names = "default";
562 compatible = "qcom,ipq8074-dwc3", "qcom,dwc3";
564 #address-cells = <1>;
565 #size-cells = <1>;
572 clock-names = "cfg_noc",
577 assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
580 assigned-clock-rates = <133330000>,
584 power-domains = <&gcc USB0_GDSC>;
594 phy-names = "usb2-phy", "usb3-phy";
595 snps,is-utmi-l1-suspend;
596 snps,hird-threshold = /bits/ 8 <0x0>;
604 compatible = "qcom,ipq8074-dwc3", "qcom,dwc3";
606 #address-cells = <1>;
607 #size-cells = <1>;
614 clock-names = "cfg_noc",
619 assigned-clocks = <&gcc GCC_SYS_NOC_USB1_AXI_CLK>,
622 assigned-clock-rates = <133330000>,
626 power-domains = <&gcc USB1_GDSC>;
636 phy-names = "usb2-phy", "usb3-phy";
637 snps,is-utmi-l1-suspend;
638 snps,hird-threshold = /bits/ 8 <0x0>;
645 intc: interrupt-controller@b000000 {
646 compatible = "qcom,msm-qgic2";
647 #address-cells = <1>;
648 #size-cells = <1>;
649 interrupt-controller;
650 #interrupt-cells = <0x3>;
655 compatible = "arm,gic-v2m-frame";
656 msi-controller;
662 compatible = "qcom,kpss-wdt";
666 timeout-sec = <30>;
670 compatible = "qcom,ipq8074-apcs-apps-global";
673 #clock-cells = <1>;
674 #mbox-cells = <1>;
678 #address-cells = <1>;
679 #size-cells = <1>;
681 compatible = "arm,armv7-timer-mem";
685 frame-number = <0>;
693 frame-number = <1>;
700 frame-number = <2>;
707 frame-number = <3>;
714 frame-number = <4>;
721 frame-number = <5>;
728 frame-number = <6>;
736 compatible = "qcom,pcie-ipq8074";
741 reg-names = "dbi", "elbi", "parf", "config";
743 linux,pci-domain = <1>;
744 bus-range = <0x00 0xff>;
745 num-lanes = <1>;
746 #address-cells = <3>;
747 #size-cells = <2>;
750 phy-names = "pciephy";
755 0 0xd00000>; /* non-prefetchable memory */
758 interrupt-names = "msi";
759 #interrupt-cells = <1>;
760 interrupt-map-mask = <0 0 0 0x7>;
761 interrupt-map = <0 0 0 1 &intc 0 142
775 clock-names = "iface",
787 reset-names = "pipe",
798 compatible = "qcom,pcie-ipq8074";
803 reg-names = "dbi", "elbi", "parf", "config";
805 linux,pci-domain = <0>;
806 bus-range = <0x00 0xff>;
807 num-lanes = <1>;
808 #address-cells = <3>;
809 #size-cells = <2>;
812 phy-names = "pciephy";
817 0 0xd00000>; /* non-prefetchable memory */
820 interrupt-names = "msi";
821 #interrupt-cells = <1>;
822 interrupt-map-mask = <0 0 0 0x7>;
823 interrupt-map = <0 0 0 1 &intc 0 75
838 clock-names = "iface",
850 reset-names = "pipe",
862 compatible = "arm,armv8-timer";