Lines Matching +full:0 +full:x1a000
21 #clock-cells = <0>;
27 #clock-cells = <0>;
32 #address-cells = <0x1>;
33 #size-cells = <0x0>;
35 CPU0: cpu@0 {
38 reg = <0x0>;
47 reg = <0x1>;
55 reg = <0x2>;
63 reg = <0x3>;
69 cache-level = <0x2>;
90 reg = <0x0 0x4ab00000 0x0 0x00100000>;
93 hwlocks = <&tcsr_mutex 0>;
98 reg = <0x0 0x4ac00000 0x0 0x00400000>;
109 #address-cells = <0x1>;
110 #size-cells = <0x1>;
111 ranges = <0 0 0 0xffffffff>;
116 reg = <0x00058000 0x1c4>;
132 reg = <0x00058200 0x130>, /* Tx */
133 <0x00058400 0x200>, /* Rx */
134 <0x00058800 0x1f8>, /* PCS */
135 <0x00058600 0x044>; /* PCS misc*/
136 #phy-cells = <0>;
137 #clock-cells = <0>;
146 reg = <0x00059000 0x180>;
147 #phy-cells = <0>;
159 reg = <0x00078000 0x1c4>;
175 reg = <0x00078200 0x130>, /* Tx */
176 <0x00078400 0x200>, /* Rx */
177 <0x00078800 0x1f8>, /* PCS */
178 <0x00078600 0x044>; /* PCS misc*/
179 #phy-cells = <0>;
180 #clock-cells = <0>;
189 reg = <0x00079000 0x180>;
190 #phy-cells = <0>;
202 reg = <0x00086000 0x1c4>;
217 reg = <0x86200 0x16c>,
218 <0x86400 0x200>,
219 <0x86800 0x4f4>;
220 #phy-cells = <0>;
221 #clock-cells = <0>;
230 reg = <0x0008e000 0x1c4>;
245 reg = <0x8e200 0x16c>,
246 <0x8e400 0x200>,
247 <0x8e800 0x4f4>;
248 #phy-cells = <0>;
249 #clock-cells = <0>;
258 reg = <0x00090000 0x64>;
260 #size-cells = <0>;
270 reg = <0x000e3000 0x1000>;
278 reg = <0x00704000 0x20000>;
290 reg = <0x0073a000 0x6000>;
302 reg = <0x01000000 0x300000>;
305 gpio-ranges = <&tlmm 0 0 70>;
306 #gpio-cells = <0x2>;
308 #interrupt-cells = <0x2>;
317 i2c_0_pins: i2c-0-pinmux {
324 spi_0_pins: spi-0-pins {
352 reg = <0x01800000 0x80000>;
353 #clock-cells = <0x1>;
355 #reset-cells = <0x1>;
360 reg = <0x01905000 0x20000>;
366 reg = <0x0200f000 0x001000>,
367 <0x02400000 0x800000>,
368 <0x02c00000 0x800000>,
369 <0x03800000 0x200000>,
370 <0x0200a000 0x000700>;
374 qcom,ee = <0>;
375 qcom,channel = <0>;
377 #size-cells = <0>;
380 cell-index = <0>;
385 reg = <0x7824900 0x500>, <0x7824000 0x800>;
408 reg = <0x07884000 0x2b000>;
413 qcom,ee = <0>;
418 reg = <0x078af000 0x200>;
428 reg = <0x078b1000 0x200>;
436 pinctrl-0 = <&hsuart_pins>;
443 reg = <0x078b3000 0x200>;
448 pinctrl-0 = <&serial_4_pins>;
456 #size-cells = <0>;
457 reg = <0x078b5000 0x600>;
465 pinctrl-0 = <&spi_0_pins>;
473 #size-cells = <0>;
474 reg = <0x078b6000 0x600>;
482 pinctrl-0 = <&i2c_0_pins>;
490 #size-cells = <0>;
491 reg = <0x078b7000 0x600>;
505 #size-cells = <0>;
506 reg = <0x78b9000 0x600>;
520 #size-cells = <0>;
521 reg = <0x078ba000 0x600>;
534 reg = <0x07984000 0x1a000>;
539 qcom,ee = <0>;
545 reg = <0x079b0000 0x10000>;
547 #size-cells = <0>;
552 dmas = <&qpic_bam 0>,
556 pinctrl-0 = <&qpic_pins>;
563 reg = <0x08af8800 0x400>;
591 reg = <0x8a00000 0xcd00>;
596 snps,hird-threshold = /bits/ 8 <0x0>;
605 reg = <0x08cf8800 0x400>;
633 reg = <0x8c00000 0xcd00>;
638 snps,hird-threshold = /bits/ 8 <0x0>;
650 #interrupt-cells = <0x3>;
651 reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
652 ranges = <0 0xb00a000 0xffd>;
654 v2m@0 {
657 reg = <0x0 0xffd>;
663 reg = <0xb017000 0x1000>;
671 reg = <0x0b111000 0x1000>;
682 reg = <0x0b120000 0x1000>;
685 frame-number = <0>;
688 reg = <0x0b121000 0x1000>,
689 <0x0b122000 0x1000>;
695 reg = <0x0b123000 0x1000>;
702 reg = <0x0b124000 0x1000>;
709 reg = <0x0b125000 0x1000>;
716 reg = <0x0b126000 0x1000>;
723 reg = <0x0b127000 0x1000>;
730 reg = <0x0b128000 0x1000>;
737 reg = <0x10000000 0xf1d>,
738 <0x10000f20 0xa8>,
739 <0x00088000 0x2000>,
740 <0x10100000 0x1000>;
744 bus-range = <0x00 0xff>;
752 ranges = <0x81000000 0 0x10200000 0x10200000
753 0 0x100000 /* downstream I/O */
754 0x82000000 0 0x10300000 0x10300000
755 0 0xd00000>; /* non-prefetchable memory */
760 interrupt-map-mask = <0 0 0 0x7>;
761 interrupt-map = <0 0 0 1 &intc 0 142
763 <0 0 0 2 &intc 0 143
765 <0 0 0 3 &intc 0 144
767 <0 0 0 4 &intc 0 145
799 reg = <0x20000000 0xf1d>,
800 <0x20000f20 0xa8>,
801 <0x00080000 0x2000>,
802 <0x20100000 0x1000>;
805 linux,pci-domain = <0>;
806 bus-range = <0x00 0xff>;
814 ranges = <0x81000000 0 0x20200000 0x20200000
815 0 0x100000 /* downstream I/O */
816 0x82000000 0 0x20300000 0x20300000
817 0 0xd00000>; /* non-prefetchable memory */
822 interrupt-map-mask = <0 0 0 0x7>;
823 interrupt-map = <0 0 0 1 &intc 0 75
825 <0 0 0 2 &intc 0 78
827 <0 0 0 3 &intc 0 79
829 <0 0 0 4 &intc 0 83