Lines Matching refs:gcc
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
185 clocks = <&gcc GCC_PRNG_AHB_CLK>;
193 clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
203 clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
204 <&gcc GCC_CRYPTO_AXI_CLK>,
205 <&gcc GCC_CRYPTO_CLK>;
240 gcc: gcc@1800000 { label
241 compatible = "qcom,gcc-ipq6018";
264 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
274 clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
275 <&gcc GCC_BLSP1_AHB_CLK>;
287 clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
288 <&gcc GCC_BLSP1_AHB_CLK>;
302 clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
303 <&gcc GCC_BLSP1_AHB_CLK>;
316 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
317 <&gcc GCC_BLSP1_AHB_CLK>;
331 clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
332 <&gcc GCC_BLSP1_AHB_CLK>;
344 clocks = <&gcc GCC_QPIC_AHB_CLK>;
356 clocks = <&gcc GCC_QPIC_CLK>,
357 <&gcc GCC_QPIC_AHB_CLK>;
397 clocks = <&gcc GCC_PCIE0_AUX_CLK>,
398 <&gcc GCC_PCIE0_AHB_CLK>;
401 resets = <&gcc GCC_PCIE0_PHY_BCR>,
402 <&gcc GCC_PCIE0PHY_PHY_BCR>;
412 clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
458 clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
459 <&gcc GCC_PCIE0_AXI_M_CLK>,
460 <&gcc GCC_PCIE0_AXI_S_CLK>,
461 <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>,
462 <&gcc PCIE0_RCHNG_CLK>;
469 resets = <&gcc GCC_PCIE0_PIPE_ARES>,
470 <&gcc GCC_PCIE0_SLEEP_ARES>,
471 <&gcc GCC_PCIE0_CORE_STICKY_ARES>,
472 <&gcc GCC_PCIE0_AXI_MASTER_ARES>,
473 <&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
474 <&gcc GCC_PCIE0_AHB_ARES>,
475 <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>,
476 <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>;
597 resets = <&gcc GCC_WCSSAON_RESET>,
598 <&gcc GCC_WCSS_BCR>,
599 <&gcc GCC_WCSS_Q6_BCR>;
605 clocks = <&gcc GCC_PRNG_AHB_CLK>;
634 clocks = <&gcc GCC_MDIO_AHB_CLK>;
644 clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
648 resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
658 clocks = <&gcc GCC_USB1_MASTER_CLK>,
659 <&gcc GCC_USB1_SLEEP_CLK>,
660 <&gcc GCC_USB1_MOCK_UTMI_CLK>;
665 assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
666 <&gcc GCC_USB1_MOCK_UTMI_CLK>;
669 resets = <&gcc GCC_USB1_BCR>;
694 clocks = <&gcc GCC_USB0_AUX_CLK>,
695 <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
698 resets = <&gcc GCC_USB0_PHY_BCR>,
699 <&gcc GCC_USB3PHY_0_PHY_BCR>;
710 clocks = <&gcc GCC_USB0_PIPE_CLK>;
721 clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
725 resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
736 clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
737 <&gcc GCC_USB0_MASTER_CLK>,
738 <&gcc GCC_USB0_SLEEP_CLK>,
739 <&gcc GCC_USB0_MOCK_UTMI_CLK>;
745 assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
746 <&gcc GCC_USB0_MASTER_CLK>,
747 <&gcc GCC_USB0_MOCK_UTMI_CLK>;
752 resets = <&gcc GCC_USB0_BCR>;