Lines Matching +full:pex +full:- +full:clk +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
15 interrupt-parent = <&lic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 compatible = "nvidia,tegra124-pcie";
25 reg-names = "pads", "afi", "cs";
28 interrupt-names = "intr", "msi";
30 #interrupt-cells = <1>;
31 interrupt-map-mask = <0 0 0 0>;
32 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
34 bus-range = <0x00 0xff>;
35 #address-cells = <3>;
36 #size-cells = <2>;
41 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
48 clock-names = "pex", "afi", "pll_e", "cml";
52 reset-names = "pex", "afi", "pcie_x";
57 assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
59 bus-range = <0x00 0xff>;
62 #address-cells = <3>;
63 #size-cells = <2>;
66 nvidia,num-lanes = <2>;
69 pci@2,0 {
71 assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
73 bus-range = <0x00 0xff>;
76 #address-cells = <3>;
77 #size-cells = <2>;
80 nvidia,num-lanes = <1>;
85 compatible = "nvidia,tegra132-host1x",
86 "nvidia,tegra124-host1x";
90 interrupt-names = "syncpt", "host1x";
92 clock-names = "host1x";
94 reset-names = "host1x";
96 #address-cells = <2>;
97 #size-cells = <2>;
102 compatible = "nvidia,tegra124-dc";
106 clock-names = "dc";
108 reset-names = "dc";
116 compatible = "nvidia,tegra124-dc";
120 clock-names = "dc";
122 reset-names = "dc";
130 compatible = "nvidia,tegra124-hdmi";
135 clock-names = "hdmi", "parent";
137 reset-names = "hdmi";
142 compatible = "nvidia,tegra124-sor";
150 clock-names = "sor", "out", "parent", "dp", "safe";
152 reset-names = "sor";
157 compatible = "nvidia,tegra124-dpaux";
162 clock-names = "dpaux", "parent";
164 reset-names = "dpaux";
167 i2c-bus {
168 #address-cells = <1>;
169 #size-cells = <0>;
174 gic: interrupt-controller@50041000 {
175 compatible = "arm,cortex-a15-gic";
176 #interrupt-cells = <3>;
177 interrupt-controller;
184 interrupt-parent = <&gic>;
193 interrupt-names = "stall", "nonstall";
196 clock-names = "gpu", "pwr";
198 reset-names = "gpu";
202 lic: interrupt-controller@60004000 {
203 compatible = "nvidia,tegra124-ictlr", "nvidia,tegra30-ictlr";
209 interrupt-controller;
210 #interrupt-cells = <3>;
211 interrupt-parent = <&gic>;
215 compatible = "nvidia,tegra124-timer", "nvidia,tegra30-timer";
224 clock-names = "timer";
228 compatible = "nvidia,tegra132-car";
230 #clock-cells = <1>;
231 #reset-cells = <1>;
232 nvidia,external-memory-controller = <&emc>;
235 flow-controller@60007000 {
236 compatible = "nvidia,tegra132-flowctrl", "nvidia,tegra124-flowctrl";
241 compatible = "nvidia,tegra124-actmon";
246 clock-names = "actmon", "emc";
248 reset-names = "actmon";
249 operating-points-v2 = <&emc_bw_dfs_opp_table>;
251 interconnect-names = "cpu-read";
252 #cooling-cells = <2>;
256 compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
266 #gpio-cells = <2>;
267 gpio-controller;
268 #interrupt-cells = <2>;
269 interrupt-controller;
273 compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
308 clock-names = "dma";
310 reset-names = "dma";
311 #dma-cells = <1>;
315 compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
321 compatible = "nvidia,tegra124-pinmux";
331 * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
333 * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
336 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
338 reg-shift = <2>;
341 clock-names = "serial";
343 reset-names = "serial";
345 dma-names = "rx", "tx";
350 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
352 reg-shift = <2>;
355 clock-names = "serial";
357 reset-names = "serial";
359 dma-names = "rx", "tx";
364 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
366 reg-shift = <2>;
369 clock-names = "serial";
371 reset-names = "serial";
373 dma-names = "rx", "tx";
378 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
380 reg-shift = <2>;
383 clock-names = "serial";
385 reset-names = "serial";
387 dma-names = "rx", "tx";
392 compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
394 #pwm-cells = <2>;
396 clock-names = "pwm";
398 reset-names = "pwm";
403 compatible = "nvidia,tegra124-i2c";
406 #address-cells = <1>;
407 #size-cells = <0>;
409 clock-names = "div-clk";
411 reset-names = "i2c";
413 dma-names = "rx", "tx";
418 compatible = "nvidia,tegra124-i2c";
421 #address-cells = <1>;
422 #size-cells = <0>;
424 clock-names = "div-clk";
426 reset-names = "i2c";
428 dma-names = "rx", "tx";
433 compatible = "nvidia,tegra124-i2c";
436 #address-cells = <1>;
437 #size-cells = <0>;
439 clock-names = "div-clk";
441 reset-names = "i2c";
443 dma-names = "rx", "tx";
448 compatible = "nvidia,tegra124-i2c";
451 #address-cells = <1>;
452 #size-cells = <0>;
454 clock-names = "div-clk";
456 reset-names = "i2c";
458 dma-names = "rx", "tx";
463 compatible = "nvidia,tegra124-i2c";
466 #address-cells = <1>;
467 #size-cells = <0>;
469 clock-names = "div-clk";
471 reset-names = "i2c";
473 dma-names = "rx", "tx";
478 compatible = "nvidia,tegra124-i2c";
481 #address-cells = <1>;
482 #size-cells = <0>;
484 clock-names = "div-clk";
486 reset-names = "i2c";
488 dma-names = "rx", "tx";
493 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
496 #address-cells = <1>;
497 #size-cells = <0>;
499 clock-names = "spi";
501 reset-names = "spi";
503 dma-names = "rx", "tx";
508 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
511 #address-cells = <1>;
512 #size-cells = <0>;
514 clock-names = "spi";
516 reset-names = "spi";
518 dma-names = "rx", "tx";
523 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
526 #address-cells = <1>;
527 #size-cells = <0>;
529 clock-names = "spi";
531 reset-names = "spi";
533 dma-names = "rx", "tx";
538 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
541 #address-cells = <1>;
542 #size-cells = <0>;
544 clock-names = "spi";
546 reset-names = "spi";
548 dma-names = "rx", "tx";
553 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
556 #address-cells = <1>;
557 #size-cells = <0>;
559 clock-names = "spi";
561 reset-names = "spi";
563 dma-names = "rx", "tx";
568 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
571 #address-cells = <1>;
572 #size-cells = <0>;
574 clock-names = "spi";
576 reset-names = "spi";
578 dma-names = "rx", "tx";
583 compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
585 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
587 clock-names = "rtc";
591 compatible = "nvidia,tegra124-pmc";
594 clock-names = "pclk", "clk32k_in";
595 #clock-cells = <1>;
599 compatible = "nvidia,tegra124-efuse";
602 clock-names = "fuse";
604 reset-names = "fuse";
607 mc: memory-controller@70019000 {
608 compatible = "nvidia,tegra132-mc";
611 clock-names = "mc";
615 #iommu-cells = <1>;
616 #reset-cells = <1>;
617 #interconnect-cells = <1>;
620 emc: external-memory-controller@7001b000 {
621 compatible = "nvidia,tegra132-emc", "nvidia,tegra124-emc";
624 clock-names = "emc";
626 nvidia,memory-controller = <&mc>;
627 operating-points-v2 = <&emc_icc_dvfs_opp_table>;
629 #interconnect-cells = <0>;
633 compatible = "nvidia,tegra124-ahci";
639 clock-names = "sata", "sata-oob";
643 reset-names = "sata", "sata-cold", "sata-oob";
648 compatible = "nvidia,tegra132-hda", "nvidia,tegra124-hda",
649 "nvidia,tegra30-hda";
655 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
659 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
664 compatible = "nvidia,tegra132-xusb", "nvidia,tegra124-xusb";
668 reg-names = "hcd", "fpci", "ipfs";
684 clock-names = "xusb_host", "xusb_host_src",
691 reset-names = "xusb_host", "xusb_ss", "xusb_src";
693 nvidia,xusb-padctl = <&padctl>;
699 compatible = "nvidia,tegra132-xusb-padctl",
700 "nvidia,tegra124-xusb-padctl";
703 reset-names = "padctl";
710 usb2-0 {
712 #phy-cells = <0>;
715 usb2-1 {
717 #phy-cells = <0>;
720 usb2-2 {
722 #phy-cells = <0>;
731 ulpi-0 {
733 #phy-cells = <0>;
742 hsic-0 {
744 #phy-cells = <0>;
747 hsic-1 {
749 #phy-cells = <0>;
758 pcie-0 {
760 #phy-cells = <0>;
763 pcie-1 {
765 #phy-cells = <0>;
768 pcie-2 {
770 #phy-cells = <0>;
773 pcie-3 {
775 #phy-cells = <0>;
778 pcie-4 {
780 #phy-cells = <0>;
789 sata-0 {
791 #phy-cells = <0>;
798 usb2-0 {
802 usb2-1 {
806 usb2-2 {
810 hsic-0 {
814 hsic-1 {
818 usb3-0 {
822 usb3-1 {
829 compatible = "nvidia,tegra124-sdhci";
833 clock-names = "sdhci";
835 reset-names = "sdhci";
840 compatible = "nvidia,tegra124-sdhci";
844 clock-names = "sdhci";
846 reset-names = "sdhci";
851 compatible = "nvidia,tegra124-sdhci";
855 clock-names = "sdhci";
857 reset-names = "sdhci";
862 compatible = "nvidia,tegra124-sdhci";
866 clock-names = "sdhci";
868 reset-names = "sdhci";
872 soctherm: thermal-sensor@700e2000 {
873 compatible = "nvidia,tegra132-soctherm";
875 <0x0 0x70040000 0x0 0x200>; /* 2: CCROC reg_base */
876 reg-names = "soctherm-reg", "ccroc-reg";
879 interrupt-names = "thermal", "edp";
882 clock-names = "tsensor", "soctherm";
884 reset-names = "soctherm";
885 #thermal-sensor-cells = <1>;
887 throttle-cfgs {
890 nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
892 #cooling-cells = <2>;
897 thermal-zones {
898 cpu-thermal {
899 polling-delay-passive = <1000>;
900 polling-delay = <0>;
902 thermal-sensors =
912 cpu_throttle_trip: throttle-trip {
919 cooling-maps {
922 cooling-device = <&throttle_heavy 1 1>;
927 mem-thermal {
928 polling-delay-passive = <0>;
929 polling-delay = <0>;
931 thermal-sensors =
947 cooling-maps {
955 gpu-thermal {
956 polling-delay-passive = <1000>;
957 polling-delay = <0>;
959 thermal-sensors =
969 gpu_throttle_trip: throttle-trip {
976 cooling-maps {
979 cooling-device = <&throttle_heavy 1 1>;
984 pllx-thermal {
985 polling-delay-passive = <0>;
986 polling-delay = <0>;
988 thermal-sensors =
1004 cooling-maps {
1014 compatible = "nvidia,tegra124-ahub";
1021 clock-names = "d_audio", "apbif";
1043 reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
1048 <&apbdma 2>, <&apbdma 2>,
1057 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
1062 #address-cells = <2>;
1063 #size-cells = <2>;
1066 compatible = "nvidia,tegra124-i2s";
1068 nvidia,ahub-cif-ids = <4 4>;
1070 clock-names = "i2s";
1072 reset-names = "i2s";
1077 compatible = "nvidia,tegra124-i2s";
1079 nvidia,ahub-cif-ids = <5 5>;
1081 clock-names = "i2s";
1083 reset-names = "i2s";
1088 compatible = "nvidia,tegra124-i2s";
1090 nvidia,ahub-cif-ids = <6 6>;
1092 clock-names = "i2s";
1094 reset-names = "i2s";
1099 compatible = "nvidia,tegra124-i2s";
1101 nvidia,ahub-cif-ids = <7 7>;
1103 clock-names = "i2s";
1105 reset-names = "i2s";
1110 compatible = "nvidia,tegra124-i2s";
1112 nvidia,ahub-cif-ids = <8 8>;
1114 clock-names = "i2s";
1116 reset-names = "i2s";
1122 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
1127 clock-names = "usb";
1129 reset-names = "usb";
1134 phy1: usb-phy@7d000000 {
1135 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1143 clock-names = "reg", "pll_u", "utmi-pads";
1145 reset-names = "usb", "utmi-pads";
1146 #phy-cells = <0>;
1147 nvidia,hssync-start-delay = <0>;
1148 nvidia,idle-wait-delay = <17>;
1149 nvidia,elastic-limit = <16>;
1150 nvidia,term-range-adj = <6>;
1151 nvidia,xcvr-setup = <9>;
1152 nvidia,xcvr-lsfslew = <0>;
1153 nvidia,xcvr-lsrslew = <3>;
1154 nvidia,hssquelch-level = <2>;
1155 nvidia,hsdiscon-level = <5>;
1156 nvidia,xcvr-hsslew = <12>;
1157 nvidia,has-utmi-pad-registers;
1163 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
1168 clock-names = "usb";
1170 reset-names = "usb";
1175 phy2: usb-phy@7d004000 {
1176 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1184 clock-names = "reg", "pll_u", "utmi-pads";
1186 reset-names = "usb", "utmi-pads";
1187 #phy-cells = <0>;
1188 nvidia,hssync-start-delay = <0>;
1189 nvidia,idle-wait-delay = <17>;
1190 nvidia,elastic-limit = <16>;
1191 nvidia,term-range-adj = <6>;
1192 nvidia,xcvr-setup = <9>;
1193 nvidia,xcvr-lsfslew = <0>;
1194 nvidia,xcvr-lsrslew = <3>;
1195 nvidia,hssquelch-level = <2>;
1196 nvidia,hsdiscon-level = <5>;
1197 nvidia,xcvr-hsslew = <12>;
1203 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
1208 clock-names = "usb";
1210 reset-names = "usb";
1215 phy3: usb-phy@7d008000 {
1216 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1224 clock-names = "reg", "pll_u", "utmi-pads";
1226 reset-names = "usb", "utmi-pads";
1227 #phy-cells = <0>;
1228 nvidia,hssync-start-delay = <0>;
1229 nvidia,idle-wait-delay = <17>;
1230 nvidia,elastic-limit = <16>;
1231 nvidia,term-range-adj = <6>;
1232 nvidia,xcvr-setup = <9>;
1233 nvidia,xcvr-lsfslew = <0>;
1234 nvidia,xcvr-lsrslew = <3>;
1235 nvidia,hssquelch-level = <2>;
1236 nvidia,hsdiscon-level = <5>;
1237 nvidia,xcvr-hsslew = <12>;
1238 nvidia,pmc = <&tegra_pmc 2>;
1243 #address-cells = <1>;
1244 #size-cells = <0>;
1248 compatible = "nvidia,tegra132-denver";
1254 compatible = "nvidia,tegra132-denver";
1260 compatible = "arm,armv7-timer";
1269 interrupt-parent = <&gic>;