Lines Matching +full:0 +full:x1101059c
28 #size-cells = <0>;
39 cpu0: cpu@0 {
42 reg = <0x0 0x0>;
49 reg = <0x0 0x1>;
79 #clock-cells = <0>;
87 reg = <0x6 0x1110000c 0x24>;
92 #clock-cells = <0>;
98 #clock-cells = <0>;
114 reg = <0x6 0x00300000 0x10000>, /* GIC Dist */
115 <0x6 0x00340000 0xc0000>, /* GICR */
116 <0x6 0x00200000 0x2000>, /* GICC */
117 <0x6 0x00210000 0x2000>, /* GICV */
118 <0x6 0x00220000 0x2000>; /* GICH */
125 reg = <0x6 0x00000000 0xd0>;
128 #mux-control-cells = <0>;
131 * SPI: value 9 - (SIMC,SIBM) = 0b1001
132 * SPI2: value 6 - (SIBM,SIMC) = 0b0110
134 mux-reg-masks = <0x88 0xf0>;
140 reg = <0x6 0x11010008 0x4>;
147 pinctrl-0 = <&uart_pins>;
150 reg = <0x6 0x00100000 0x20>;
160 pinctrl-0 = <&uart2_pins>;
163 reg = <0x6 0x00102000 0x20>;
174 #size-cells = <0>;
176 reg = <0x6 0x00104000 0x40>;
187 reg = <0x6 0x00105000 0x1000>;
196 reg = <0x6 0x00800000 0x1000>;
197 pinctrl-0 = <&emmc_pins>;
209 reg = <0x6 0x110101e0 0x90>, <0x6 0x10508010 0x100>;
212 gpio-ranges = <&gpio 0 0 64>;
300 #size-cells = <0>;
304 pinctrl-0 = <&sgpio0_pins>;
306 resets = <&reset 0>;
308 reg = <0x6 0x1101036c 0x100>;
309 sgpio_in0: gpio@0 {
311 reg = <0>;
330 #size-cells = <0>;
334 pinctrl-0 = <&sgpio1_pins>;
336 resets = <&reset 0>;
338 reg = <0x6 0x11010484 0x100>;
339 sgpio_in1: gpio@0 {
341 reg = <0>;
360 #size-cells = <0>;
364 pinctrl-0 = <&sgpio2_pins>;
366 resets = <&reset 0>;
368 reg = <0x6 0x1101059c 0x100>;
369 sgpio_in2: gpio@0 {
370 reg = <0>;
391 pinctrl-0 = <&i2c_pins>;
393 reg = <0x6 0x00101000 0x100>;
395 #size-cells = <0>;
405 pinctrl-0 = <&i2c2_pins>;
407 reg = <0x6 0x00103000 0x100>;
409 #size-cells = <0>;
418 reg = <0x6 0x10508110 0xc>;
419 #thermal-sensor-cells = <0>;
427 #size-cells = <0>;
428 reg = <0x6 0x110102b0 0x24>;
434 pinctrl-0 = <&miim1_pins>;
437 #size-cells = <0>;
438 reg = <0x6 0x110102d4 0x24>;
444 pinctrl-0 = <&miim2_pins>;
447 #size-cells = <0>;
448 reg = <0x6 0x110102d4 0x24>;
454 pinctrl-0 = <&miim3_pins>;
457 #size-cells = <0>;
458 reg = <0x6 0x1101031c 0x24>;
465 reg = <0x6 0x10808000 0x5d0000>;
468 switch: switch@0x600000000 {
470 reg = <0x6 0 0x401000>,
471 <0x6 0x10004000 0x7fc000>,
472 <0x6 0x11010000 0xaf0000>;
478 resets = <&reset 0>;