Lines Matching +full:0 +full:x11d40000
34 #clock-cells = <0>;
41 #clock-cells = <0>;
48 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0x000>;
64 reg = <0x100>;
75 reg = <0x200>;
86 reg = <0x300>;
97 reg = <0x400>;
108 reg = <0x500>;
119 reg = <0x600>;
130 reg = <0x700>;
188 arm,psci-suspend-param = <0x00010001>;
196 arm,psci-suspend-param = <0x00010001>;
204 arm,psci-suspend-param = <0x01010002>;
212 arm,psci-suspend-param = <0x01010002>;
241 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
242 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
243 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
244 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
260 reg = <0 0x0c000000 0 0x40000>,
261 <0 0x0c040000 0 0x200000>;
262 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
265 ppi_cluster0: interrupt-partition-0 {
276 reg = <0 0x10000000 0 0x1000>;
282 reg = <0 0x10001000 0 0x1000>;
289 reg = <0 0x10003000 0 0x1000>;
295 reg = <0 0x10005000 0 0x1000>,
296 <0 0x11c20000 0 0x1000>,
297 <0 0x11d10000 0 0x1000>,
298 <0 0x11d30000 0 0x1000>,
299 <0 0x11d40000 0 0x1000>,
300 <0 0x11e20000 0 0x1000>,
301 <0 0x11e70000 0 0x1000>,
302 <0 0x11ea0000 0 0x1000>,
303 <0 0x11f20000 0 0x1000>,
304 <0 0x11f30000 0 0x1000>,
305 <0 0x1000b000 0 0x1000>;
312 gpio-ranges = <&pio 0 0 220>;
314 interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 0>;
320 reg = <0 0x10006000 0 0x1000>;
326 #size-cells = <0>;
337 #power-domain-cells = <0>;
345 #power-domain-cells = <0>;
353 #size-cells = <0>;
360 #size-cells = <0>;
365 #power-domain-cells = <0>;
370 #power-domain-cells = <0>;
375 #power-domain-cells = <0>;
380 #power-domain-cells = <0>;
385 #power-domain-cells = <0>;
397 clock-names = "disp", "disp-0", "disp-1", "disp-2",
401 #size-cells = <0>;
411 clock-names = "ipe", "ipe-0", "ipe-1", "ipe-2",
414 #power-domain-cells = <0>;
422 clock-names = "isp", "isp-0", "isp-1";
424 #power-domain-cells = <0>;
432 clock-names = "isp2", "isp2-0", "isp2-1";
434 #power-domain-cells = <0>;
441 clock-names = "mdp", "mdp-0";
443 #power-domain-cells = <0>;
450 clock-names = "venc", "venc-0";
452 #power-domain-cells = <0>;
461 clock-names = "vdec", "vdec-0", "vdec-1", "vdec-2";
464 #size-cells = <0>;
472 clock-names = "vdec2-0", "vdec2-1",
474 #power-domain-cells = <0>;
485 clock-names = "cam", "cam-0", "cam-1", "cam-2",
489 #size-cells = <0>;
495 clock-names = "cam_rawa-0";
496 #power-domain-cells = <0>;
502 clock-names = "cam_rawb-0";
503 #power-domain-cells = <0>;
509 clock-names = "cam_rawc-0";
510 #power-domain-cells = <0>;
519 reg = <0 0x10007000 0 0x100>;
525 reg = <0 0x1000c000 0 0x1000>;
532 reg = <0 0x10017000 0 0x1000>;
533 interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH 0>;
540 reg = <0 0x10026000 0 0x1000>;
542 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
552 reg = <0 0x10027000 0 0x000e00>,
553 <0 0x10029000 0 0x000100>;
567 reg = <0 0x10228000 0 0x4000>;
568 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
576 reg = <0 0x10720000 0 0x1000>;
583 reg = <0 0x11002000 0 0x1000>;
584 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
593 reg = <0 0x11003000 0 0x1000>;
594 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
602 reg = <0 0x11007000 0 0x1000>;
610 #size-cells = <0>;
611 reg = <0 0x1100a000 0 0x1000>;
612 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH 0>;
622 reg = <0 0x1100e000 0 0x1000>;
623 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0>;
635 #size-cells = <0>;
636 reg = <0 0x11010000 0 0x1000>;
637 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH 0>;
649 #size-cells = <0>;
650 reg = <0 0x11012000 0 0x1000>;
651 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH 0>;
663 #size-cells = <0>;
664 reg = <0 0x11013000 0 0x1000>;
665 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH 0>;
677 #size-cells = <0>;
678 reg = <0 0x11018000 0 0x1000>;
679 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH 0>;
691 #size-cells = <0>;
692 reg = <0 0x11019000 0 0x1000>;
693 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH 0>;
705 #size-cells = <0>;
706 reg = <0 0x1101d000 0 0x1000>;
707 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH 0>;
719 #size-cells = <0>;
720 reg = <0 0x1101e000 0 0x1000>;
721 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH 0>;
731 reg = <0 0x10500000 0 0x100000>,
732 <0 0x10720000 0 0xe0000>,
733 <0 0x10700000 0 0x8000>;
735 interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH 0>;
744 reg = <0 0x11200000 0 0x1000>,
745 <0 0x11203e00 0 0x0100>;
747 interrupts-extended = <&gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
763 mediatek,syscon-wakeup = <&pericfg 0x420 102>;
769 reg = <0 0x11210000 0 0x2000>;
774 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 0>;
899 reg = <0 0x11230000 0 0x2000>;
913 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH 0>;
914 bus-range = <0x00 0xff>;
915 ranges = <0x82000000 0 0x12000000 0x0 0x12000000 0 0x0800000>,
916 <0x81000000 0 0x12800000 0x0 0x12800000 0 0x0800000>;
918 interrupt-map-mask = <0 0 0 7>;
919 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
920 <0 0 0 2 &pcie_intc0 1>,
921 <0 0 0 3 &pcie_intc0 2>,
922 <0 0 0 4 &pcie_intc0 3>;
926 #address-cells = <0>;
933 reg = <0 0x11234000 0 0xe0>;
934 interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 0>;
942 #size-cells = <0>;
948 reg = <0 0x11c10000 0 0x1000>;
953 reg = <0x1c0 0x58>;
957 reg = <0x580 0x68>;
963 reg = <0 0x11cb0000 0 0x1000>,
964 <0 0x10217300 0 0x80>;
965 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
971 #size-cells = <0>;
977 reg = <0 0x11cb1000 0 0x1000>;
983 reg = <0 0x11d00000 0 0x1000>,
984 <0 0x10217600 0 0x180>;
985 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
991 #size-cells = <0>;
997 reg = <0 0x11d01000 0 0x1000>,
998 <0 0x10217780 0 0x180>;
999 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
1005 #size-cells = <0>;
1011 reg = <0 0x11d02000 0 0x1000>,
1012 <0 0x10217900 0 0x180>;
1013 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH 0>;
1019 #size-cells = <0>;
1025 reg = <0 0x11d03000 0 0x1000>;
1031 reg = <0 0x11d20000 0 0x1000>,
1032 <0 0x10217100 0 0x80>;
1033 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1039 #size-cells = <0>;
1045 reg = <0 0x11d21000 0 0x1000>,
1046 <0 0x10217180 0 0x180>;
1047 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>;
1053 #size-cells = <0>;
1059 reg = <0 0x11d22000 0 0x1000>,
1060 <0 0x10217380 0 0x180>;
1061 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1067 #size-cells = <0>;
1073 reg = <0 0x11d23000 0 0x1000>;
1079 reg = <0 0x11e00000 0 0x1000>,
1080 <0 0x10217500 0 0x80>;
1081 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1087 #size-cells = <0>;
1093 reg = <0 0x11e01000 0 0x1000>;
1102 ranges = <0x0 0x0 0x11e40000 0x1000>;
1104 u2port0: usb-phy@0 {
1105 reg = <0x0 0x700>;
1112 reg = <0x700 0x900>;
1121 reg = <0 0x11e50000 0 0x1000>;
1123 #clock-cells = <0>;
1124 #phy-cells = <0>;
1131 reg = <0 0x11f00000 0 0x1000>,
1132 <0 0x10217080 0 0x80>;
1133 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;
1139 #size-cells = <0>;
1145 reg = <0 0x11f01000 0 0x1000>,
1146 <0 0x10217580 0 0x80>;
1147 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1153 #size-cells = <0>;
1159 reg = <0 0x11f02000 0 0x1000>;
1165 reg = <0 0x11f10000 0 0x1000>;
1171 reg = <0 0x11f60000 0 0x1000>, <0 0x11f50000 0 0x1000>;
1172 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
1187 reg = <0 0x11f70000 0 0x1000>, <0 0x11c70000 0 0x1000>;
1188 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>;
1203 reg = <0 0x13fbf000 0 0x1000>;
1209 reg = <0 0x14000000 0 0x1000>;
1212 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
1214 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
1219 reg = <0 0x14001000 0 0x1000>;
1220 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>;
1229 reg = <0 0x14002000 0 0x1000>;
1240 reg = <0 0x14003000 0 0x1000>;
1241 mediatek,larb-id = <0>;
1250 reg = <0 0x14004000 0 0x1000>;
1260 reg = <0 0x14005000 0 0x1000>;
1261 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH 0>;
1266 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
1271 reg = <0 0x14006000 0 0x1000>;
1272 interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH 0>;
1277 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
1283 reg = <0 0x14007000 0 0x1000>;
1284 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH 0>;
1289 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x7000 0x1000>;
1295 reg = <0 0x14009000 0 0x1000>;
1296 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH 0>;
1299 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
1304 reg = <0 0x1400a000 0 0x1000>;
1305 interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH 0>;
1308 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xa000 0x1000>;
1314 reg = <0 0x1400b000 0 0x1000>;
1315 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH 0>;
1318 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>;
1324 reg = <0 0x1400c000 0 0x1000>;
1325 interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH 0>;
1328 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;
1333 reg = <0 0x1400d000 0 0x1000>;
1334 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>;
1337 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;
1343 reg = <0 0x1400e000 0 0x1000>;
1344 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH 0>;
1347 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>;
1352 reg = <0 0x14010000 0 0x1000>;
1353 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
1371 reg = <0 0x14014000 0 0x1000>;
1372 interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH 0>;
1377 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x4000 0x1000>;
1383 reg = <0 0x14015000 0 0x1000>;
1384 interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH 0>;
1389 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
1394 reg = <0 0x14016000 0 0x1000>;
1395 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH 0>;
1405 reg = <0 0x1401d000 0 0x1000>;
1411 interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH 0>;
1420 reg = <0 0x15020000 0 0x1000>;
1426 reg = <0 0x1502e000 0 0x1000>;
1437 reg = <0 0x15820000 0 0x1000>;
1443 reg = <0 0x1582e000 0 0x1000>;
1454 reg = <0 0x1600d000 0 0x1000>;
1465 reg = <0 0x1600f000 0 0x1000>;
1471 reg = <0 0x1602e000 0 0x1000>;
1482 reg = <0 0x1602f000 0 0x1000>;
1488 reg = <0 0x17000000 0 0x1000>;
1494 reg = <0 0x17010000 0 0x1000>;
1505 reg = <0 0x17020000 0 0x2000>;
1517 interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 0>;
1528 reg = <0 0x1a000000 0 0x1000>;
1534 reg = <0 0x1a001000 0 0x1000>;
1545 reg = <0 0x1a002000 0 0x1000>;
1556 reg = <0 0x1a00f000 0 0x1000>;
1567 reg = <0 0x1a010000 0 0x1000>;
1578 reg = <0 0x1a011000 0 0x1000>;
1589 reg = <0 0x1a04f000 0 0x1000>;
1595 reg = <0 0x1a06f000 0 0x1000>;
1601 reg = <0 0x1a08f000 0 0x1000>;
1607 reg = <0 0x1b000000 0 0x1000>;
1613 reg = <0 0x1b00f000 0 0x1000>;
1624 reg = <0 0x1b10f000 0 0x1000>;
1635 reg = <0 0x1f000000 0 0x1000>;
1641 reg = <0 0x1f002000 0 0x1000>;