Lines Matching +full:vusb33 +full:- +full:supply
6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
25 stdout-path = "serial0:115200n8";
31 proc-supply = <&mt6380_vcpu_reg>;
32 sram-supply = <&mt6380_vm_reg>;
36 proc-supply = <&mt6380_vcpu_reg>;
37 sram-supply = <&mt6380_vm_reg>;
41 gpio-keys {
42 compatible = "gpio-keys";
44 key-factory {
50 key-wps {
61 reg_1p8v: regulator-1p8v {
62 compatible = "regulator-fixed";
63 regulator-name = "fixed-1.8V";
64 regulator-min-microvolt = <1800000>;
65 regulator-max-microvolt = <1800000>;
66 regulator-always-on;
69 reg_3p3v: regulator-3p3v {
70 compatible = "regulator-fixed";
71 regulator-name = "fixed-3.3V";
72 regulator-min-microvolt = <3300000>;
73 regulator-max-microvolt = <3300000>;
74 regulator-boot-on;
75 regulator-always-on;
78 reg_5v: regulator-5v {
79 compatible = "regulator-fixed";
80 regulator-name = "fixed-5V";
81 regulator-min-microvolt = <5000000>;
82 regulator-max-microvolt = <5000000>;
83 regulator-boot-on;
84 regulator-always-on;
97 pinctrl-names = "default";
98 pinctrl-0 = <&irrx_pins>;
103 pinctrl-names = "default";
104 pinctrl-0 = <ð_pins>;
108 compatible = "mediatek,eth-mac";
110 phy-mode = "2500base-x";
112 fixed-link {
114 full-duplex;
119 mdio-bus {
120 #address-cells = <1>;
121 #size-cells = <0>;
126 reset-gpios = <&pio 54 0>;
129 #address-cells = <1>;
130 #size-cells = <0>;
161 phy-mode = "2500base-x";
163 fixed-link {
165 full-duplex;
176 pinctrl-names = "default";
177 pinctrl-0 = <&i2c1_pins>;
182 pinctrl-names = "default";
183 pinctrl-0 = <&i2c2_pins>;
188 pinctrl-names = "default", "state_uhs";
189 pinctrl-0 = <&emmc_pins_default>;
190 pinctrl-1 = <&emmc_pins_uhs>;
192 bus-width = <8>;
193 max-frequency = <50000000>;
194 cap-mmc-highspeed;
195 mmc-hs200-1_8v;
196 vmmc-supply = <®_3p3v>;
197 vqmmc-supply = <®_1p8v>;
198 assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
199 assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
200 non-removable;
204 pinctrl-names = "default", "state_uhs";
205 pinctrl-0 = <&sd0_pins_default>;
206 pinctrl-1 = <&sd0_pins_uhs>;
208 bus-width = <4>;
209 max-frequency = <50000000>;
210 cap-sd-highspeed;
212 cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
213 vmmc-supply = <®_3p3v>;
214 vqmmc-supply = <®_3p3v>;
215 assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
216 assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
220 pinctrl-names = "default";
221 pinctrl-0 = <¶llel_nand_pins>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&spi_nor_pins>;
231 compatible = "jedec,spi-nor";
237 pinctrl-names = "default";
238 pinctrl-0 = <&pcie0_pins>;
244 emmc_pins_default: emmc-pins-default {
254 conf-cmd-dat {
258 input-enable;
259 bias-pull-up;
262 conf-clk {
264 bias-pull-down;
268 emmc_pins_uhs: emmc-pins-uhs {
274 conf-cmd-dat {
278 input-enable;
279 drive-strength = <4>;
280 bias-pull-up;
283 conf-clk {
285 drive-strength = <4>;
286 bias-pull-down;
290 eth_pins: eth-pins {
297 i2c1_pins: i2c1-pins {
304 i2c2_pins: i2c2-pins {
311 i2s1_pins: i2s1-pins {
322 drive-strength = <12>;
323 bias-pull-down;
327 irrx_pins: irrx-pins {
334 irtx_pins: irtx-pins {
342 parallel_nand_pins: parallel-nand-pins {
349 pcie0_pins: pcie0-pins {
358 pcie1_pins: pcie1-pins {
367 pmic_bus_pins: pmic-bus-pins {
374 pwm7_pins: pwm1-2-pins {
381 wled_pins: wled-pins {
388 sd0_pins_default: sd0-pins-default {
398 conf-cmd-data {
401 input-enable;
402 drive-strength = <8>;
403 bias-pull-up;
405 conf-clk {
407 drive-strength = <12>;
408 bias-pull-down;
410 conf-cd {
412 bias-pull-up;
416 sd0_pins_uhs: sd0-pins-uhs {
422 conf-cmd-data {
425 input-enable;
426 bias-pull-up;
429 conf-clk {
431 bias-pull-down;
435 /* Serial NAND is shared pin with SPI-NOR */
436 serial_nand_pins: serial-nand-pins {
443 spic0_pins: spic0-pins {
450 spic1_pins: spic1-pins {
457 /* SPI-NOR is shared pin with serial NAND */
458 spi_nor_pins: spi-nor-pins {
465 /* serial NAND is shared pin with SPI-NOR */
466 serial_nand_pins: serial-nand-pins {
473 uart0_pins: uart0-pins {
480 uart2_pins: uart2-pins {
487 watchdog_pins: watchdog-pins {
494 wmac_pins: wmac-pins {
506 pinctrl-names = "default";
507 pinctrl-0 = <&pwm7_pins>;
512 pinctrl-names = "default";
513 pinctrl-0 = <&pmic_bus_pins>;
527 pinctrl-names = "default";
528 pinctrl-0 = <&spic0_pins>;
533 pinctrl-names = "default";
534 pinctrl-0 = <&spic1_pins>;
539 vusb33-supply = <®_3p3v>;
540 vbus-supply = <®_5v>;
549 pinctrl-names = "default";
550 pinctrl-0 = <&uart0_pins>;
555 pinctrl-names = "default";
556 pinctrl-0 = <&uart2_pins>;
561 pinctrl-names = "default";
562 pinctrl-0 = <&watchdog_pins>;
567 pinctrl-names = "default";
568 pinctrl-0 = <&wmac_pins>;