Lines Matching +full:mod +full:- +full:def0 +full:- +full:gpios

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/bus/moxtet.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include "armada-372x.dtsi"
16 compatible = "cznic,turris-mox", "marvell,armada3720",
28 stdout-path = "serial0:115200n8";
37 compatible = "gpio-leds";
40 gpios = <&gpiosb 21 GPIO_ACTIVE_LOW>;
41 linux,default-trigger = "default-on";
45 gpio-keys {
46 compatible = "gpio-keys";
48 key-reset {
51 gpios = <&gpiosb 20 GPIO_ACTIVE_LOW>;
52 debounce-interval = <60>;
56 exp_usb3_vbus: usb3-vbus {
57 compatible = "regulator-fixed";
58 regulator-name = "usb3-vbus";
59 regulator-min-microvolt = <5000000>;
60 regulator-max-microvolt = <5000000>;
61 enable-active-high;
62 regulator-always-on;
66 vsdc_reg: vsdc-reg {
67 compatible = "regulator-gpio";
68 regulator-name = "vsdc";
69 regulator-min-microvolt = <1800000>;
70 regulator-max-microvolt = <3300000>;
71 regulator-boot-on;
73 gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
74 gpios-states = <0>;
77 enable-active-high;
80 vsdio_reg: vsdio-reg {
81 compatible = "regulator-gpio";
82 regulator-name = "vsdio";
83 regulator-min-microvolt = <1800000>;
84 regulator-max-microvolt = <3300000>;
85 regulator-boot-on;
87 gpios = <&gpiosb 22 GPIO_ACTIVE_HIGH>;
88 gpios-states = <0>;
91 enable-active-high;
94 sdhci1_pwrseq: sdhci1-pwrseq {
95 compatible = "mmc-pwrseq-simple";
96 reset-gpios = <&gpionb 19 GPIO_ACTIVE_HIGH>;
102 i2c-bus = <&i2c0>;
103 los-gpios = <&moxtet_sfp 0 GPIO_ACTIVE_HIGH>;
104 tx-fault-gpios = <&moxtet_sfp 1 GPIO_ACTIVE_HIGH>;
105 mod-def0-gpios = <&moxtet_sfp 2 GPIO_ACTIVE_LOW>;
106 tx-disable-gpios = <&moxtet_sfp 4 GPIO_ACTIVE_HIGH>;
107 rate-select0-gpios = <&moxtet_sfp 5 GPIO_ACTIVE_HIGH>;
108 maximum-power-milliwatt = <3000>;
110 /* enabled by U-Boot if SFP module is present */
115 armada-3700-rwtm {
116 compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm";
122 pinctrl-names = "default";
123 pinctrl-0 = <&i2c1_pins>;
124 clock-frequency = <100000>;
125 /delete-property/ mrvl,i2c-fast-mode;
135 pinctrl-names = "default";
136 pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
138 reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
140 * U-Boot port for Turris Mox has a bug which always expects that "ranges" DT property
145 * conditions are not met then U-Boot crashes during loading kernel DTB file. PCIe address
148 * This bug is not present in U-Boot ports for other Armada 3700 devices and is fixed in
149 * U-Boot version 2021.07. See relevant U-Boot commits (the last one contains fix):
150 * https://source.denx.de/u-boot/u-boot/-/commit/cb2ddb291ee6fcbddd6d8f4ff49089dfe580f5d7
151 * https://source.denx.de/u-boot/u-boot/-/commit/c64ac3b3185aeb3846297ad7391fc6df8ecd73bf
152 * https://source.denx.de/u-boot/u-boot/-/commit/4a82fca8e330157081fc132a591ebd99ba02ee33
154 * in U-Boot version 2022.04 by following commit:
155 * https://source.denx.de/u-boot/u-boot/-/commit/1fd54253bca7d43d046bba4853fe5fafd034bc17
157 #address-cells = <3>;
158 #size-cells = <2>;
162 /* enabled by U-Boot if PCIe module is present */
171 pinctrl-names = "default";
172 pinctrl-0 = <&rgmii_pins>;
173 phy-mode = "rgmii-id";
174 phy-handle = <&phy1>;
179 phy-mode = "2500base-x";
180 managed = "in-band-status";
185 wp-inverted;
186 bus-width = <4>;
187 cd-gpios = <&gpionb 10 GPIO_ACTIVE_HIGH>;
188 vqmmc-supply = <&vsdc_reg>;
189 marvell,pad-type = "sd";
194 pinctrl-names = "default";
195 pinctrl-0 = <&sdio_pins>;
196 non-removable;
197 bus-width = <4>;
198 marvell,pad-type = "sd";
199 vqmmc-supply = <&vsdio_reg>;
200 mmc-pwrseq = <&sdhci1_pwrseq>;
202 sdhci-caps-mask = <0x2 0x0>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&spi_quad_pins &spi_cs1_pins>;
210 assigned-clocks = <&nb_periph_clk 7>;
211 assigned-clock-parents = <&tbg 1>;
212 assigned-clock-rates = <20000000>;
215 #address-cells = <1>;
216 #size-cells = <1>;
217 compatible = "jedec,spi-nor";
219 spi-max-frequency = <20000000>;
222 compatible = "fixed-partitions";
223 #address-cells = <1>;
224 #size-cells = <1>;
227 label = "secure-firmware";
232 label = "a53-firmware";
237 label = "u-boot-env";
254 #address-cells = <1>;
255 #size-cells = <0>;
258 reset-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
259 spi-max-frequency = <10000000>;
260 spi-cpol;
261 spi-cpha;
262 interrupt-controller;
263 #interrupt-cells = <1>;
264 interrupt-parent = <&gpiosb>;
269 compatible = "cznic,moxtet-gpio";
270 gpio-controller;
271 #gpio-cells = <2>;
284 compatible = "usb-a-connector";
285 phy-supply = <&exp_usb3_vbus>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&smi_pins>;
299 phy1: ethernet-phy@1 {
303 /* switch nodes are enabled by U-Boot if modules are present */
308 interrupt-parent = <&moxtet>;
313 #address-cells = <1>;
314 #size-cells = <0>;
350 #address-cells = <1>;
351 #size-cells = <0>;
356 phy-handle = <&switch0phy1>;
362 phy-handle = <&switch0phy2>;
368 phy-handle = <&switch0phy3>;
374 phy-handle = <&switch0phy4>;
380 phy-handle = <&switch0phy5>;
386 phy-handle = <&switch0phy6>;
392 phy-handle = <&switch0phy7>;
398 phy-handle = <&switch0phy8>;
405 phy-mode = "2500base-x";
406 managed = "in-band-status";
412 phy-mode = "2500base-x";
413 managed = "in-band-status";
418 port-sfp@a {
422 phy-mode = "sgmii";
423 managed = "in-band-status";
433 interrupt-parent = <&moxtet>;
438 #address-cells = <1>;
439 #size-cells = <0>;
459 #address-cells = <1>;
460 #size-cells = <0>;
465 phy-handle = <&switch0phy1_topaz>;
471 phy-handle = <&switch0phy2_topaz>;
477 phy-handle = <&switch0phy3_topaz>;
483 phy-handle = <&switch0phy4_topaz>;
489 phy-mode = "2500base-x";
490 managed = "in-band-status";
500 interrupt-parent = <&moxtet>;
505 #address-cells = <1>;
506 #size-cells = <0>;
542 #address-cells = <1>;
543 #size-cells = <0>;
548 phy-handle = <&switch1phy1>;
554 phy-handle = <&switch1phy2>;
560 phy-handle = <&switch1phy3>;
566 phy-handle = <&switch1phy4>;
572 phy-handle = <&switch1phy5>;
578 phy-handle = <&switch1phy6>;
584 phy-handle = <&switch1phy7>;
590 phy-handle = <&switch1phy8>;
596 phy-mode = "2500base-x";
597 managed = "in-band-status";
604 phy-mode = "2500base-x";
605 managed = "in-band-status";
610 port-sfp@a {
614 phy-mode = "sgmii";
615 managed = "in-band-status";
625 interrupt-parent = <&moxtet>;
630 #address-cells = <1>;
631 #size-cells = <0>;
651 #address-cells = <1>;
652 #size-cells = <0>;
657 phy-handle = <&switch1phy1_topaz>;
663 phy-handle = <&switch1phy2_topaz>;
669 phy-handle = <&switch1phy3_topaz>;
675 phy-handle = <&switch1phy4_topaz>;
681 phy-mode = "2500base-x";
682 managed = "in-band-status";
692 interrupt-parent = <&moxtet>;
697 #address-cells = <1>;
698 #size-cells = <0>;
734 #address-cells = <1>;
735 #size-cells = <0>;
740 phy-handle = <&switch2phy1>;
746 phy-handle = <&switch2phy2>;
752 phy-handle = <&switch2phy3>;
758 phy-handle = <&switch2phy4>;
764 phy-handle = <&switch2phy5>;
770 phy-handle = <&switch2phy6>;
776 phy-handle = <&switch2phy7>;
782 phy-handle = <&switch2phy8>;
788 phy-mode = "2500base-x";
789 managed = "in-band-status";
793 port-sfp@a {
797 phy-mode = "sgmii";
798 managed = "in-band-status";
808 interrupt-parent = <&moxtet>;
813 #address-cells = <1>;
814 #size-cells = <0>;
834 #address-cells = <1>;
835 #size-cells = <0>;
840 phy-handle = <&switch2phy1_topaz>;
846 phy-handle = <&switch2phy2_topaz>;
852 phy-handle = <&switch2phy3_topaz>;
858 phy-handle = <&switch2phy4_topaz>;
864 phy-mode = "2500base-x";
865 managed = "in-band-status";