Lines Matching +full:enable +full:- +full:frequency +full:- +full:shift
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
36 compatible = "arm,cortex-a55";
38 enable-method = "psci";
39 next-level-cache = <&l2>;
44 compatible = "arm,cortex-a55";
46 enable-method = "psci";
47 next-level-cache = <&l2>;
50 l2: l2-cache {
56 compatible = "arm,psci-0.2";
61 compatible = "arm,armv8-timer";
69 compatible = "arm,armv8-pmuv3";
74 compatible = "simple-bus";
75 #address-cells = <2>;
76 #size-cells = <2>;
78 dma-ranges;
80 internal-regs@7f000000 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "simple-bus";
86 dma-coherent;
89 compatible = "snps,dw-apb-uart";
91 reg-shift = <2>;
93 reg-io-width = <1>;
99 compatible = "snps,dw-apb-uart";
101 reg-shift = <2>;
103 reg-io-width = <1>;
109 compatible = "snps,dw-apb-uart";
111 reg-shift = <2>;
113 reg-io-width = <1>;
119 compatible = "snps,dw-apb-uart";
121 reg-shift = <2>;
123 reg-io-width = <1>;
129 #address-cells = <1>;
130 #size-cells = <0>;
131 compatible = "marvell,orion-mdio";
137 compatible = "marvell,mv78230-i2c";
139 #address-cells = <1>;
140 #size-cells = <0>;
143 clock-names = "core";
145 clock-frequency=<100000>;
147 pinctrl-names = "default", "gpio";
148 pinctrl-0 = <&i2c0_pins>;
149 pinctrl-1 = <&i2c0_gpio>;
150 scl-gpios = <&gpio0 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
151 sda-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
156 compatible = "marvell,mv78230-i2c";
158 #address-cells = <1>;
159 #size-cells = <0>;
162 clock-names = "core";
164 clock-frequency=<100000>;
166 pinctrl-names = "default", "gpio";
167 pinctrl-0 = <&i2c1_pins>;
168 pinctrl-1 = <&i2c1_gpio>;
169 scl-gpios = <&gpio0 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
170 sda-gpios = <&gpio0 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
175 compatible = "marvell,orion-gpio";
178 gpio-controller;
179 #gpio-cells = <2>;
180 gpio-ranges = <&pinctrl0 0 0 32>;
181 marvell,pwm-offset = <0x1f0>;
182 interrupt-controller;
183 #interrupt-cells = <2>;
192 compatible = "marvell,orion-gpio";
194 gpio-controller;
195 #gpio-cells = <2>;
196 gpio-ranges = <&pinctrl0 0 32 14>;
197 marvell,pwm-offset = <0x1f0>;
198 interrupt-controller;
199 #interrupt-cells = <2>;
209 behind-32bit-controller@7f000000 {
210 compatible = "simple-bus";
211 #address-cells = <0x2>;
212 #size-cells = <0x2>;
215 dma-ranges = <0x0 0x0 0x2 0x0 0x1 0x0>;
216 dma-coherent;
219 compatible = "marvell,armada-ac5-neta";
223 phy-mode = "sgmii";
228 compatible = "marvell,armada-ac5-neta";
232 phy-mode = "sgmii";
237 compatible = "marvell,orion-ehci";
244 compatible = "marvell,orion-ehci";
252 compatible = "marvell,ac5-pinctrl";
255 i2c0_pins: i2c0-pins {
260 i2c0_gpio: i2c0-gpio-pins {
265 i2c1_pins: i2c1-pins {
270 i2c1_gpio: i2c1-gpio-pins {
277 compatible = "marvell,armada-3700-spi";
279 #address-cells = <0x1>;
280 #size-cells = <0x0>;
283 num-cs = <1>;
288 compatible = "marvell,armada-3700-spi";
290 #address-cells = <0x1>;
291 #size-cells = <0x0>;
294 num-cs = <1>;
298 gic: interrupt-controller@80600000 {
299 compatible = "arm,gic-v3";
300 #interrupt-cells = <3>;
301 interrupt-controller;
309 cnm_clock: cnm-clock {
310 compatible = "fixed-clock";
311 #clock-cells = <0>;
312 clock-frequency = <328000000>;
315 spi_clock: spi-clock {
316 compatible = "fixed-clock";
317 #clock-cells = <0>;
318 clock-frequency = <200000000>;