Lines Matching +full:0 +full:xfd4a0000
20 #size-cells = <0>;
22 cpu0: cpu@0 {
25 reg = <0x0 0x0>;
31 reg = <0x0 0x1>;
38 reg = <0x0 0x2>;
45 reg = <0x0 0x3>;
57 cpu_suspend = <0x84000001>;
58 cpu_off = <0x84000002>;
59 cpu_on = <0x84000003>;
66 reg = <0x0 0xc0001000 0x1000>,
67 <0x0 0xc0002000 0x2000>,
68 <0x0 0xc0004000 0x2000>,
69 <0x0 0xc0006000 0x2000>;
86 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0x0f) |
88 <GIC_PPI 14 (GIC_CPU_MASK_RAW(0x0f) |
90 <GIC_PPI 11 (GIC_CPU_MASK_RAW(0x0f) |
92 <GIC_PPI 10 (GIC_CPU_MASK_RAW(0x0f) |
97 #clock-cells = <0>;
114 reg = <0x0 0xc3700000 0x1000>;
135 reg = <0x0 0xfd100000 0x1000>;
142 reg = <0x0 0xfd200000 0x1000>;
149 reg = <0x0 0xfe000000 0x1000>;
150 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
157 reg = <0x0 0xfe100000 0x1000>;
165 reg = <0x0 0xfe200000 0x1000>;
173 reg = <0x0 0xfe800000 0x1000>;
180 reg = <0x0 0xfe900000 0x1000>;
187 reg = <0x0 0xc1128000 0x1000>;
197 reg = <0x0 0xfd400000 0x1000>;
206 reg = <0x0 0xfd410000 0x1000>;
215 reg = <0x0 0xfd420000 0x1000>;
224 reg = <0x0 0xfd430000 0x1000>;
232 reg = <0x0 0xfd440000 0x1000>;
241 reg = <0x0 0xfd450000 0x1000>;
250 reg = <0x0 0xfd460000 0x1000>;
259 reg = <0x0 0xfd470000 0x1000>;
268 reg = <0x0 0xfd480000 0x1000>;
277 reg = <0x0 0xfd490000 0x1000>;
286 reg = <0x0 0xfd4a0000 0x1000>;
295 reg = <0x0 0xfd4b0000 0x1000>;
303 reg = <0x0 0xfd4c0000 0x1000>;
312 reg = <0x0 0xfd4d0000 0x1000>;
321 reg = <0x0 0xfd4e0000 0x1000>;
330 reg = <0x0 0xfd4f0000 0x1000>;
339 reg = <0x0 0xfd500000 0x1000>;
348 reg = <0x0 0xfd510000 0x1000>;