Lines Matching +full:dwmac +full:- +full:4
1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "shared-dma-pool";
26 no-map;
31 #address-cells = <1>;
32 #size-cells = <0>;
35 compatible = "arm,cortex-a53";
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
44 enable-method = "psci";
49 compatible = "arm,cortex-a53";
51 enable-method = "psci";
56 compatible = "arm,cortex-a53";
58 enable-method = "psci";
64 compatible = "arm,armv8-pmuv3";
69 interrupt-affinity = <&cpu0>,
73 interrupt-parent = <&intc>;
77 compatible = "arm,psci-0.2";
81 intc: interrupt-controller@fffc1000 {
82 compatible = "arm,gic-400", "arm,cortex-a15-gic";
83 #interrupt-cells = <3>;
84 interrupt-controller;
92 cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
93 #clock-cells = <0>;
94 compatible = "fixed-clock";
97 cb_intosc_ls_clk: cb-intosc-ls-clk {
98 #clock-cells = <0>;
99 compatible = "fixed-clock";
102 f2s_free_clk: f2s-free-clk {
103 #clock-cells = <0>;
104 compatible = "fixed-clock";
108 #clock-cells = <0>;
109 compatible = "fixed-clock";
112 qspi_clk: qspi-clk {
113 #clock-cells = <0>;
114 compatible = "fixed-clock";
115 clock-frequency = <200000000>;
120 compatible = "arm,armv8-timer";
121 interrupt-parent = <&intc>;
122 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
123 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
124 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
125 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
129 #phy-cells = <0>;
130 compatible = "usb-nop-xceiv";
134 #address-cells = <1>;
135 #size-cells = <1>;
136 compatible = "simple-bus";
138 interrupt-parent = <&intc>;
142 #address-cells = <0x1>;
143 #size-cells = <0x1>;
144 compatible = "fpga-region";
145 fpga-mgr = <&fpga_mgr>;
148 clkmgr: clock-controller@ffd10000 {
149 compatible = "intel,agilex-clkmgr";
151 #clock-cells = <1>;
155 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
158 interrupt-names = "macirq";
159 mac-address = [00 00 00 00 00 00];
161 reset-names = "stmmaceth", "stmmaceth-ocp";
162 tx-fifo-depth = <16384>;
163 rx-fifo-depth = <16384>;
164 snps,multicast-filter-bins = <256>;
166 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
168 clock-names = "stmmaceth", "ptp_ref";
173 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
176 interrupt-names = "macirq";
177 mac-address = [00 00 00 00 00 00];
179 reset-names = "stmmaceth", "stmmaceth-ocp";
180 tx-fifo-depth = <16384>;
181 rx-fifo-depth = <16384>;
182 snps,multicast-filter-bins = <256>;
184 altr,sysmgr-syscon = <&sysmgr 0x48 0>;
186 clock-names = "stmmaceth", "ptp_ref";
191 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
194 interrupt-names = "macirq";
195 mac-address = [00 00 00 00 00 00];
197 reset-names = "stmmaceth", "stmmaceth-ocp";
198 tx-fifo-depth = <16384>;
199 rx-fifo-depth = <16384>;
200 snps,multicast-filter-bins = <256>;
202 altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
204 clock-names = "stmmaceth", "ptp_ref";
209 #address-cells = <1>;
210 #size-cells = <0>;
211 compatible = "snps,dw-apb-gpio";
216 porta: gpio-controller@0 {
217 compatible = "snps,dw-apb-gpio-port";
218 gpio-controller;
219 #gpio-cells = <2>;
220 snps,nr-gpios = <24>;
222 interrupt-controller;
223 #interrupt-cells = <2>;
229 #address-cells = <1>;
230 #size-cells = <0>;
231 compatible = "snps,dw-apb-gpio";
236 portb: gpio-controller@0 {
237 compatible = "snps,dw-apb-gpio-port";
238 gpio-controller;
239 #gpio-cells = <2>;
240 snps,nr-gpios = <24>;
242 interrupt-controller;
243 #interrupt-cells = <2>;
249 #address-cells = <1>;
250 #size-cells = <0>;
251 compatible = "snps,designware-i2c";
260 #address-cells = <1>;
261 #size-cells = <0>;
262 compatible = "snps,designware-i2c";
271 #address-cells = <1>;
272 #size-cells = <0>;
273 compatible = "snps,designware-i2c";
282 #address-cells = <1>;
283 #size-cells = <0>;
284 compatible = "snps,designware-i2c";
293 #address-cells = <1>;
294 #size-cells = <0>;
295 compatible = "snps,designware-i2c";
304 #address-cells = <1>;
305 #size-cells = <0>;
306 compatible = "altr,socfpga-dw-mshc";
309 fifo-depth = <0x400>;
311 reset-names = "reset";
314 clock-names = "biu", "ciu";
319 nand: nand-controller@ffb90000 {
320 #address-cells = <1>;
321 #size-cells = <0>;
322 compatible = "altr,socfpga-denali-nand";
325 reg-names = "nand_data", "denali_reg";
330 clock-names = "nand", "nand_x", "ecc";
336 compatible = "mmio-sram";
340 pdma: dma-controller@ffda0000 {
352 #dma-cells = <1>;
354 reset-names = "dma", "dma-ocp";
356 clock-names = "apb_pclk";
360 #reset-cells = <1>;
361 compatible = "altr,stratix10-rst-mgr";
366 compatible = "arm,mmu-500", "arm,smmu-v2";
368 #global-interrupts = <2>;
369 #iommu-cells = <1>;
370 interrupt-parent = <&intc>;
373 /* Global Non-secure Fault */
375 /* Non-secure Context Interrupts (32) */
408 stream-match-mask = <0x7ff0>;
416 compatible = "snps,dw-apb-ssi";
417 #address-cells = <1>;
418 #size-cells = <0>;
422 reset-names = "spi";
423 reg-io-width = <4>;
424 num-cs = <4>;
430 compatible = "snps,dw-apb-ssi";
431 #address-cells = <1>;
432 #size-cells = <0>;
436 reset-names = "spi";
437 reg-io-width = <4>;
438 num-cs = <4>;
444 compatible = "altr,sys-mgr-s10","altr,sys-mgr";
449 compatible = "snps,dw-apb-timer";
453 clock-names = "timer";
457 compatible = "snps,dw-apb-timer";
461 clock-names = "timer";
465 compatible = "snps,dw-apb-timer";
469 clock-names = "timer";
473 compatible = "snps,dw-apb-timer";
477 clock-names = "timer";
481 compatible = "snps,dw-apb-uart";
484 reg-shift = <2>;
485 reg-io-width = <4>;
492 compatible = "snps,dw-apb-uart";
495 reg-shift = <2>;
496 reg-io-width = <4>;
503 compatible = "intel,socfpga-agilex-hsotg", "snps,dwc2";
507 phy-names = "usb2-phy";
509 reset-names = "dwc2", "dwc2-ecc";
511 clock-names = "otg";
517 compatible = "intel,socfpga-agilex-hsotg", "snps,dwc2";
521 phy-names = "usb2-phy";
523 reset-names = "dwc2", "dwc2-ecc";
530 compatible = "snps,dw-wdt";
539 compatible = "snps,dw-wdt";
548 compatible = "snps,dw-wdt";
557 compatible = "snps,dw-wdt";
566 compatible = "altr,sdr-ctl", "syscon";
571 compatible = "altr,socfpga-s10-ecc-manager",
572 "altr,socfpga-a10-ecc-manager";
573 altr,sysmgr-syscon = <&sysmgr>;
574 #address-cells = <1>;
575 #size-cells = <1>;
577 interrupt-controller;
578 #interrupt-cells = <2>;
582 compatible = "altr,sdram-edac-s10";
583 altr,sdr-syscon = <&sdr>;
587 ocram-ecc@ff8cc000 {
588 compatible = "altr,socfpga-s10-ocram-ecc",
589 "altr,socfpga-a10-ocram-ecc";
591 altr,ecc-parent = <&ocram>;
595 usb0-ecc@ff8c4000 {
596 compatible = "altr,socfpga-s10-usb-ecc",
597 "altr,socfpga-usb-ecc";
599 altr,ecc-parent = <&usb0>;
603 emac0-rx-ecc@ff8c0000 {
604 compatible = "altr,socfpga-s10-eth-mac-ecc",
605 "altr,socfpga-eth-mac-ecc";
607 altr,ecc-parent = <&gmac0>;
608 interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
611 emac0-tx-ecc@ff8c0400 {
612 compatible = "altr,socfpga-s10-eth-mac-ecc",
613 "altr,socfpga-eth-mac-ecc";
615 altr,ecc-parent = <&gmac0>;
619 sdmmca-ecc@ff8c8c00 {
620 compatible = "altr,socfpga-s10-sdmmc-ecc",
621 "altr,socfpga-sdmmc-ecc";
623 altr,ecc-parent = <&mmc>;
630 compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
631 #address-cells = <1>;
632 #size-cells = <0>;
636 cdns,fifo-depth = <128>;
637 cdns,fifo-width = <4>;
638 cdns,trigger-address = <0x00000000>;
646 compatible = "intel,agilex-svc";
648 memory-region = <&service_reserved>;
650 fpga_mgr: fpga-mgr {
651 compatible = "intel,agilex-soc-fpga-mgr";