Lines Matching full:clkmgr
148 clkmgr: clock-controller@ffd10000 { label
149 compatible = "intel,agilex-clkmgr";
167 clocks = <&clkmgr AGILEX_EMAC0_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;
185 clocks = <&clkmgr AGILEX_EMAC1_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;
203 clocks = <&clkmgr AGILEX_EMAC2_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;
255 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
266 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
277 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
288 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
299 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
312 clocks = <&clkmgr AGILEX_L4_MP_CLK>,
313 <&clkmgr AGILEX_SDMMC_CLK>;
327 clocks = <&clkmgr AGILEX_NAND_CLK>,
328 <&clkmgr AGILEX_NAND_X_CLK>,
329 <&clkmgr AGILEX_NAND_ECC_CLK>;
355 clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
409 clocks = <&clkmgr AGILEX_MPU_CCU_CLK>,
410 <&clkmgr AGILEX_L3_MAIN_FREE_CLK>,
411 <&clkmgr AGILEX_L4_MAIN_CLK>;
425 clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
439 clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
452 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
460 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
468 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
476 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
488 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
498 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
510 clocks = <&clkmgr AGILEX_USB_CLK>;
525 clocks = <&clkmgr AGILEX_USB_CLK>;
534 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;
543 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;
552 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;
561 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;