Lines Matching +full:reg +full:- +full:io +full:- +full:width
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a53";
22 reg = <0x0>;
23 enable-method = "psci";
27 compatible = "arm,cortex-a53";
29 reg = <0x1>;
30 enable-method = "psci";
34 compatible = "arm,cortex-a53";
36 reg = <0x2>;
37 enable-method = "psci";
41 compatible = "arm,cortex-a53";
43 reg = <0x3>;
44 enable-method = "psci";
49 compatible = "arm,psci-0.2";
53 gic: interrupt-controller@20500000 {
54 compatible = "arm,gic-v3";
55 interrupt-controller;
56 #interrupt-cells = <3>;
57 reg = <0x0 0x20500000 0x0 0x20000>, /* GICD */
64 compatible = "arm,armv8-timer";
65 /* Secure, non-secure, virtual, and hypervisor */
73 compatible = "arm,armv8-pmuv3";
78 compatible = "simple-bus";
79 #address-cells = <2>;
80 #size-cells = <2>;
84 compatible = "snps,dw-apb-uart";
85 reg = <0x0 0x20150000 0x0 0x100>;
87 clock-frequency = <24000000>;
88 reg-shift = <2>;
89 reg-io-width = <4>;
94 compatible = "snps,dw-apb-uart";
95 reg = <0x0 0x20160000 0x0 0x100>;
97 clock-frequency = <24000000>;
98 reg-shift = <2>;
99 reg-io-width = <4>;
104 compatible = "snps,dw-apb-uart";
105 reg = <0x0 0x20170000 0x0 0x100>;
107 clock-frequency = <24000000>;
108 reg-shift = <2>;
109 reg-io-width = <4>;
114 compatible = "snps,dw-apb-uart";
115 reg = <0x0 0x20180000 0x0 0x100>;
117 clock-frequency = <24000000>;
118 reg-shift = <2>;
119 reg-io-width = <4>;