Lines Matching +full:imx8mq +full:- +full:reset
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
6 /dts-v1/;
8 #include "imx8mq-tqma8mq.dtsi"
12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx";
13 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq";
23 extcon_usbotg: extcon-usbotg0 {
24 compatible = "linux,extcon-usb-gpio";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_usbcon0>;
27 id-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
30 pcie0_refclk: pcie0-refclk {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
33 clock-frequency = <100000000>;
36 pcie1_refclk: pcie1-refclk {
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <100000000>;
42 reg_otg_vbus: regulator-otg-vbus {
43 compatible = "regulator-fixed";
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_regotgvbus>;
46 regulator-name = "MBA8MQ_OTG_VBUS";
47 regulator-min-microvolt = <5000000>;
48 regulator-max-microvolt = <5000000>;
50 enable-active-high;
53 reg_usdhc2_vmmc: regulator-vmmc {
54 compatible = "regulator-fixed";
55 regulator-name = "VSD_3V3";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
59 enable-active-high;
78 gpio-controller;
79 #gpio-cells = <2>;
80 vcc-supply = <®_vcc_3v3>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_expander>;
83 interrupt-parent = <&gpio1>;
85 interrupt-controller;
86 #interrupt-cells = <2>;
88 mpcie-rst-hog {
89 gpio-hog;
91 output-high;
92 line-name = "MPCIE_RST#";
106 reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>;
111 clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
112 epdev_on-supply = <®_vcc_3v3>;
113 hard-wired = <1>;
118 * miniPCIe, also usable for cards with USB. Therefore configure the reset as
126 clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
127 epdev_on-supply = <®_vcc_3v3>;
128 hard-wired = <1>;
133 assigned-clocks = <&clk IMX8MQ_CLK_SAI3>;
134 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
135 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
143 clock-names = "mclk";
148 assigned-clocks = <&clk IMX8MQ_CLK_UART1>;
149 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
153 assigned-clocks = <&clk IMX8MQ_CLK_UART2>;
154 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
159 assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
160 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
164 vbus-supply = <®_otg_vbus>;
171 hnp-disable;
172 srp-disable;
173 adp-disable;
175 disable-over-current;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_wdog>;
192 fsl,ext-reset-output;
312 /* ID: floating / high: device, low: host -> use PU */
326 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
336 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
346 pinctrl_usdhc2_gpio: usdhc2-gpiogrp {