Lines Matching +full:0 +full:x41
26 pinctrl-0 = <&pinctrl_usbcon0>;
32 #clock-cells = <0>;
38 #clock-cells = <0>;
45 pinctrl-0 = <&pinctrl_regotgvbus>;
77 reg = <0x25>;
82 pinctrl-0 = <&pinctrl_expander>;
90 gpios = <13 0>;
191 pinctrl-0 = <&pinctrl_wdog>;
198 fsl,pins = <MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x0000004e>,
199 <MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x0000004e>,
200 <MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x0000004e>,
201 <MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x0000004e>;
205 fsl,pins = <MX8MQ_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x0000004e>,
206 <MX8MQ_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x0000004e>,
207 <MX8MQ_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x0000004e>,
208 <MX8MQ_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x0000004e>;
212 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0xd6>;
216 fsl,pins = <MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3>,
217 <MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23>,
218 <MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f>,
219 <MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f>,
220 <MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f>,
221 <MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f>,
222 <MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91>,
223 <MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91>,
224 <MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91>,
225 <MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91>,
226 <MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f>,
227 <MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91>,
228 <MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91>,
229 <MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f>;
233 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x41>,
234 <MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x41>,
235 <MX8MQ_IOMUXC_NAND_WE_B_GPIO3_IO17 0x41>;
239 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x41>,
240 <MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x41>,
241 <MX8MQ_IOMUXC_NAND_READY_B_GPIO3_IO16 0x41>;
245 fsl,pins = <MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000067>,
246 <MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000067>;
250 fsl,pins = <MX8MQ_IOMUXC_I2C2_SCL_GPIO5_IO16 0x40000067>,
251 <MX8MQ_IOMUXC_I2C2_SDA_GPIO5_IO17 0x40000067>;
255 fsl,pins = <MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000067>,
256 <MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000067>;
260 fsl,pins = <MX8MQ_IOMUXC_I2C3_SCL_GPIO5_IO18 0x40000067>,
261 <MX8MQ_IOMUXC_I2C3_SDA_GPIO5_IO19 0x40000067>;
265 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO14_PWM3_OUT 0x16>;
269 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO15_PWM4_OUT 0x16>;
274 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x06>;
278 fsl,pins = <MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0xc1>;
282 fsl,pins = <MX8MQ_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6>,
283 <MX8MQ_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0xd6>,
284 <MX8MQ_IOMUXC_SAI3_RXFS_SAI3_RX_SYNC 0xd6>,
285 <MX8MQ_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6>,
286 <MX8MQ_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6>,
287 <MX8MQ_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6>,
288 <MX8MQ_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6>;
292 fsl,pins = <MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x79>,
293 <MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x79>;
297 fsl,pins = <MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x79>,
298 <MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x79>;
302 fsl,pins = <MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x79>,
303 <MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x79>;
307 fsl,pins = <MX8MQ_IOMUXC_UART4_RXD_UART4_DCE_RX 0x79>,
308 <MX8MQ_IOMUXC_UART4_TXD_UART4_DCE_TX 0x79>;
313 fsl,pins = <MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xe6>;
317 fsl,pins = <MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83>,
318 <MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3>,
319 <MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3>,
320 <MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3>,
321 <MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3>,
322 <MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3>,
323 <MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1>;
327 fsl,pins = <MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85>,
328 <MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5>,
329 <MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc5>,
330 <MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc5>,
331 <MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc5>,
332 <MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc5>,
333 <MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1>;
337 fsl,pins = <MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f>,
338 <MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7>,
339 <MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc7>,
340 <MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc7>,
341 <MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc7>,
342 <MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc7>,
343 <MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1>;
347 fsl,pins = <MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41>;