Lines Matching +full:1 +full:e60000
47 #address-cells = <1>;
70 A53_1: cpu@1 {
260 thermal-sensors = <&tmu 1>;
300 #address-cells = <1>;
301 #size-cells = <1>;
309 #address-cells = <1>;
310 #size-cells = <1>;
382 #thermal-sensor-cells = <1>;
424 #address-cells = <1>;
425 #size-cells = <1>;
484 #clock-cells = <1>;
519 #reset-cells = <1>;
530 #address-cells = <1>;
538 pgc_pcie_phy: power-domain@1 {
641 #address-cells = <1>;
642 #size-cells = <1>;
701 #address-cells = <1>;
702 #size-cells = <1>;
706 #address-cells = <1>;
714 dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
720 #address-cells = <1>;
728 dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
734 #address-cells = <1>;
742 dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
815 #address-cells = <1>;
816 #size-cells = <1>;
846 #address-cells = <1>;
856 #address-cells = <1>;
866 #address-cells = <1>;
876 #address-cells = <1>;
904 mu2: mailbox@30e60000 {
914 #address-cells = <1>;
924 #address-cells = <1>;
984 #address-cells = <1>;
1060 #interconnect-cells = <1>;
1079 #address-cells = <1>;
1080 #size-cells = <1>;
1130 #power-domain-cells = <1>;
1160 #power-domain-cells = <1>;
1174 num-lanes = <1>;
1178 #interrupt-cells = <1>;
1180 interrupt-map = <0 0 0 1 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1229 #power-domain-cells = <1>;
1286 #address-cells = <1>;
1287 #size-cells = <1>;
1328 #address-cells = <1>;
1329 #size-cells = <1>;
1353 mboxes = <&mu2 2 0>, <&mu2 2 1>,
1354 <&mu2 3 0>, <&mu2 3 1>;