Lines Matching +full:0 +full:x1d0
17 pinctrl-0 = <&pinctrl_gpio_led>;
28 reg = <0x0 0x40000000 0 0x80000000>;
34 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
46 pinctrl-0 = <&pinctrl_ir>;
56 #sound-dai-cells = <0>;
59 pinctrl-0 = <&pinctrl_gpio_wlf>;
111 pinctrl-0 = <&pinctrl_fec1>;
119 #size-cells = <0>;
121 ethphy0: ethernet-phy@0 {
123 reg = <0>;
139 pinctrl-0 = <&pinctrl_flexspi>;
142 flash0: flash@0 {
144 reg = <0>;
156 pinctrl-0 = <&pinctrl_i2c1>;
163 pinctrl-0 = <&pinctrl_i2c2>;
169 pinctrl-0 = <&pinctrl_typec1>;
170 reg = <0x50>;
199 pinctrl-0 = <&pinctrl_i2c3>;
204 reg = <0x20>;
211 #sound-dai-cells = <0>;
213 pinctrl-0 = <&pinctrl_sai2>;
222 pinctrl-0 = <&pinctrl_sai3>;
236 pinctrl-0 = <&pinctrl_spdif1>;
245 pinctrl-0 = <&pinctrl_uart2>;
251 pinctrl-0 = <&pinctrl_uart3>;
280 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
293 pinctrl-0 = <&pinctrl_usdhc3>;
303 pinctrl-0 = <&pinctrl_wdog>;
311 MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x3
312 MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
313 MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
314 MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
315 MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
316 MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
317 MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
318 MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
319 MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
320 MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
321 MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
322 MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
323 MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
324 MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
325 MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
331 MX8MN_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
332 MX8MN_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
333 MX8MN_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
334 MX8MN_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
335 MX8MN_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
336 MX8MN_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
342 MX8MN_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
348 MX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6
354 MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f
360 MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
361 MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
367 MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
368 MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
374 MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
375 MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
381 MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
387 MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
393 MX8MN_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
394 MX8MN_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
395 MX8MN_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
396 MX8MN_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
402 MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
403 MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
404 MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
405 MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
411 MX8MN_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6
412 MX8MN_IOMUXC_SPDIF_RX_SPDIF1_IN 0xd6
418 MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
424 MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
425 MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
431 MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
432 MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
433 MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
434 MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
440 MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4
446 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
447 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
448 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
449 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
450 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
451 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
452 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
458 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
459 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
460 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
461 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
462 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
463 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
464 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
470 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
471 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
472 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
473 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
474 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
475 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
476 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
482 MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190
483 MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
484 MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
485 MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
486 MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
487 MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
488 MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
489 MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
490 MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
491 MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
492 MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
498 MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194
499 MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
500 MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
501 MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
502 MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
503 MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
504 MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
505 MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
506 MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
507 MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
508 MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
514 MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196
515 MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
516 MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
517 MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
518 MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
519 MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
520 MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
521 MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
522 MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
523 MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
524 MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
530 MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166