Lines Matching +full:0 +full:x1d0
15 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
24 reg = <0x0 0x40000000 0 0x80000000>;
66 pinctrl-0 = <&pinctrl_fec1>;
74 #size-cells = <0>;
76 ethphy0: ethernet-phy@0 {
78 reg = <0>;
85 pinctrl-0 = <&pinctrl_flexspi>;
88 flash@0 {
89 reg = <0>;
102 pinctrl-0 = <&pinctrl_i2c1>;
107 reg = <0x4b>;
109 pinctrl-0 = <&pinctrl_pmic>;
114 #clock-cells = <0>;
115 clocks = <&osc_32k 0>;
221 pinctrl-0 = <&pinctrl_i2c3>;
228 reg = <0x50>;
233 reg = <0x51>;
239 pinctrl-0 = <&pinctrl_uart1>;
258 #size-cells = <0>;
260 pinctrl-0 = <&pinctrl_usdhc1>;
274 pinctrl-0 = <&pinctrl_wlan>;
283 pinctrl-0 = <&pinctrl_usdhc3>;
293 pinctrl-0 = <&pinctrl_wdog>;
301 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
302 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
303 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
304 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
305 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
306 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
307 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
308 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
309 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
310 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
311 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
312 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
313 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
314 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
315 MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
321 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
322 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
328 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
329 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
335 MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
336 MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
337 MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
338 MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
339 MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
340 MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
346 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
352 MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
353 MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
354 MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
355 MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
356 MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19
357 MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x19
358 MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x19
359 MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141
365 MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
371 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
372 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
373 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
374 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
375 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
376 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
382 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
383 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
384 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
385 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
386 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
387 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
393 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
394 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
395 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
396 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
397 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
398 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
404 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
405 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
406 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
407 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
408 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
409 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
410 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
411 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
412 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
413 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
414 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
420 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
421 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
422 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
423 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
424 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
425 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
426 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
427 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
428 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
429 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
430 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
436 MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
437 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
438 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
439 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
440 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
441 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
442 MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
443 MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
444 MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
445 MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
446 MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
452 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166
458 MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x111