Lines Matching +full:dbvdd +full:- +full:supply
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 compatible = "gpio-leds";
15 default-state = "off";
21 default-state = "off";
27 default-state = "off";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_led3>;
35 linux,default-trigger = "heartbeat";
39 pcie0_refclk: pcie0-refclk {
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <100000000>;
45 pcie0_refclk_gated: pcie0-refclk-gated {
46 compatible = "gpio-gate-clock";
48 #clock-cells = <0>;
49 enable-gpios = <&pca6416_1 2 GPIO_ACTIVE_LOW>;
52 reg_audio: regulator-audio {
53 compatible = "regulator-fixed";
54 regulator-name = "3v3_aud";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
58 enable-active-high;
61 reg_usbotg1: regulator-usbotg1 {
62 compatible = "regulator-fixed";
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_reg_usb_otg1>;
65 regulator-name = "usb_otg_vbus";
66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <5000000>;
69 enable-active-high;
72 reg_camera: regulator-camera {
73 compatible = "regulator-fixed";
74 regulator-name = "mipi_pwr";
75 regulator-min-microvolt = <2800000>;
76 regulator-max-microvolt = <2800000>;
78 enable-active-high;
79 startup-delay-us = <100000>;
82 reg_pcie0: regulator-pcie {
83 compatible = "regulator-fixed";
84 regulator-name = "pci_pwr_en";
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
87 enable-active-high;
89 startup-delay-us = <100000>;
92 reg_usdhc2_vmmc: regulator-usdhc2 {
93 compatible = "regulator-fixed";
94 regulator-name = "VSD_3V3";
95 regulator-min-microvolt = <3300000>;
96 regulator-max-microvolt = <3300000>;
98 enable-active-high;
102 compatible = "fsl,imx-audio-wm8962";
103 model = "wm8962-audio";
104 audio-cpu = <&sai3>;
105 audio-codec = <&wm8962>;
106 audio-routing =
121 pinctrl-names = "default";
122 pinctrl-0 = <&pinctrl_espi2>;
123 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
129 spi-max-frequency = <5000000>;
130 spi-cpha;
131 spi-cpol;
134 address-width = <16>;
139 clock-frequency = <400000>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_i2c2>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_ov5640>;
150 clock-names = "xclk";
151 assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
152 assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
153 assigned-clock-rates = <24000000>;
154 AVDD-supply = <®_camera>; /* 2.8v */
155 powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
156 reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
159 /* MIPI CSI-2 bus endpoint */
161 remote-endpoint = <&imx8mm_mipi_csi_in>;
162 clock-lanes = <0>;
163 data-lanes = <1 2>;
170 clock-frequency = <400000>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_i2c4>;
175 wm8962: audio-codec@1a {
179 DCVDD-supply = <®_audio>;
180 DBVDD-supply = <®_audio>;
181 AVDD-supply = <®_audio>;
182 CPVDD-supply = <®_audio>;
183 MICVDD-supply = <®_audio>;
184 PLLVDD-supply = <®_audio>;
185 SPKVDD1-supply = <®_audio>;
186 SPKVDD2-supply = <®_audio>;
187 gpio-cfg = <
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_pcal6414>;
202 gpio-controller;
203 #gpio-cells = <2>;
204 interrupt-parent = <&gpio4>;
211 gpio-controller;
212 #gpio-cells = <2>;
213 interrupt-parent = <&gpio4>;
223 remote-endpoint = <&ov5640_to_mipi_csi2>;
224 data-lanes = <1 2>;
231 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
232 fsl,tx-deemph-gen1 = <0x2d>;
233 fsl,tx-deemph-gen2 = <0xf>;
234 fsl,clkreq-unsupported;
236 clock-names = "ref";
241 pinctrl-names = "default";
242 pinctrl-0 = <&pinctrl_pcie0>;
243 reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
246 clock-names = "pcie", "pcie_aux", "pcie_bus";
247 assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
249 assigned-clock-rates = <10000000>, <250000000>;
250 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
252 vpcie-supply = <®_pcie0>;
257 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_sai3>;
259 assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
260 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
261 assigned-clock-rates = <24576000>;
262 fsl,sai-mclk-direction-output;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_uart2>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_uart3>;
279 assigned-clocks = <&clk IMX8MM_CLK_UART3>;
280 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
281 uart-has-rtscts;
286 vbus-supply = <®_usbotg1>;
287 disable-over-current;
293 pinctrl-names = "default";
294 disable-over-current;
300 reset-gpios = <&pca6416_1 7 GPIO_ACTIVE_HIGH>;
304 pinctrl-names = "default", "state_100mhz", "state_200mhz";
305 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
306 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
307 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
308 bus-width = <4>;
309 vmmc-supply = <®_usdhc2_vmmc>;
351 pinctrl_pcal6414: pcal6414-gpiogrp {
414 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
426 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {