Lines Matching +full:imx8qxp +full:- +full:iomuxc
1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx8-clock.h>
7 #include <dt-bindings/firmware/imx/rsrc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/pads-imx8dxl.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
34 #address-cells = <2>;
35 #size-cells = <0>;
37 /* We have 1 clusters with 2 Cortex-A35 cores */
40 compatible = "arm,cortex-a35";
42 enable-method = "psci";
43 next-level-cache = <&A35_L2>;
45 #cooling-cells = <2>;
46 operating-points-v2 = <&a35_opp_table>;
51 compatible = "arm,cortex-a35";
53 enable-method = "psci";
54 next-level-cache = <&A35_L2>;
56 #cooling-cells = <2>;
57 operating-points-v2 = <&a35_opp_table>;
60 A35_L2: l2-cache0 {
65 a35_opp_table: opp-table {
66 compatible = "operating-points-v2";
67 opp-shared;
69 opp-900000000 {
70 opp-hz = /bits/ 64 <900000000>;
71 opp-microvolt = <1000000>;
72 clock-latency-ns = <150000>;
75 opp-1200000000 {
76 opp-hz = /bits/ 64 <1200000000>;
77 opp-microvolt = <1100000>;
78 clock-latency-ns = <150000>;
79 opp-suspend;
83 gic: interrupt-controller@51a00000 {
84 compatible = "arm,gic-v3";
87 #interrupt-cells = <3>;
88 interrupt-controller;
92 reserved-memory {
93 #address-cells = <2>;
94 #size-cells = <2>;
99 no-map;
104 compatible = "arm,armv8-pmuv3";
109 compatible = "arm,psci-1.0";
113 system-controller {
114 compatible = "fsl,imx-scu";
115 mbox-names = "tx0",
122 pd: power-controller {
123 compatible = "fsl,scu-pd";
124 #power-domain-cells = <1>;
125 wakeup-irq = <160 163 235 236 237 228 229 230 231 238
129 clk: clock-controller {
130 compatible = "fsl,imx8dxl-clk", "fsl,scu-clk";
131 #clock-cells = <2>;
133 clock-names = "xtal_32KHz", "xtal_24Mhz";
136 iomuxc: pinctrl { label
137 compatible = "fsl,imx8dxl-iomuxc";
141 compatible = "fsl,imx8qxp-scu-ocotp";
142 #address-cells = <1>;
143 #size-cells = <1>;
155 compatible = "fsl,imx8qxp-sc-rtc";
159 compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
161 wakeup-source;
165 compatible = "fsl,imx-sc-wdt";
166 timeout-sec = <60>;
169 tsens: thermal-sensor {
170 compatible = "fsl,imx-sc-thermal";
171 #thermal-sensor-cells = <1>;
176 compatible = "arm,armv8-timer";
178 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* Physical Non-Secure */
183 thermal_zones: thermal-zones {
184 cpu-thermal0 {
185 polling-delay-passive = <250>;
186 polling-delay = <2000>;
187 thermal-sensors = <&tsens IMX_SC_R_SYSTEM>;
202 cooling-maps {
205 cooling-device =
214 xtal32k: clock-xtal32k {
215 compatible = "fixed-clock";
216 #clock-cells = <0>;
217 clock-frequency = <32768>;
218 clock-output-names = "xtal_32KHz";
221 xtal24m: clock-xtal24m {
222 compatible = "fixed-clock";
223 #clock-cells = <0>;
224 clock-frequency = <24000000>;
225 clock-output-names = "xtal_24MHz";
229 #include "imx8-ss-adma.dtsi"
230 #include "imx8-ss-conn.dtsi"
231 #include "imx8-ss-ddr.dtsi"
232 #include "imx8-ss-lsio.dtsi"
235 #include "imx8dxl-ss-adma.dtsi"
236 #include "imx8dxl-ss-conn.dtsi"
237 #include "imx8dxl-ss-lsio.dtsi"
238 #include "imx8dxl-ss-ddr.dtsi"