Lines Matching +full:0 +full:x2010000
12 /memreserve/ 0x80000000 0x00010000;
26 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
35 d-cache-size = <0x8000>;
38 i-cache-size = <0xC000>;
50 reg = <0x1>;
51 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
52 d-cache-size = <0x8000>;
55 i-cache-size = <0xC000>;
67 reg = <0x100>;
69 d-cache-size = <0x8000>;
72 i-cache-size = <0xC000>;
84 reg = <0x101>;
86 d-cache-size = <0x8000>;
89 i-cache-size = <0xC000>;
101 reg = <0x200>;
103 d-cache-size = <0x8000>;
106 i-cache-size = <0xC000>;
118 reg = <0x201>;
120 d-cache-size = <0x8000>;
123 i-cache-size = <0xC000>;
135 reg = <0x300>;
137 d-cache-size = <0x8000>;
140 i-cache-size = <0xC000>;
152 reg = <0x301>;
154 d-cache-size = <0x8000>;
157 i-cache-size = <0xC000>;
169 reg = <0x400>;
171 d-cache-size = <0x8000>;
174 i-cache-size = <0xC000>;
186 reg = <0x401>;
188 d-cache-size = <0x8000>;
191 i-cache-size = <0xC000>;
203 reg = <0x500>;
205 d-cache-size = <0x8000>;
208 i-cache-size = <0xC000>;
220 reg = <0x501>;
222 d-cache-size = <0x8000>;
225 i-cache-size = <0xC000>;
237 reg = <0x600>;
239 d-cache-size = <0x8000>;
242 i-cache-size = <0xC000>;
254 reg = <0x601>;
256 d-cache-size = <0x8000>;
259 i-cache-size = <0xC000>;
271 reg = <0x700>;
273 d-cache-size = <0x8000>;
276 i-cache-size = <0xC000>;
288 reg = <0x701>;
290 d-cache-size = <0x8000>;
293 i-cache-size = <0xC000>;
303 cache-size = <0x100000>;
311 cache-size = <0x100000>;
319 cache-size = <0x100000>;
327 cache-size = <0x100000>;
335 cache-size = <0x100000>;
343 cache-size = <0x100000>;
351 cache-size = <0x100000>;
359 cache-size = <0x100000>;
368 arm,psci-suspend-param = <0x0>;
377 reg = <0x0 0x06000000 0 0x10000>, // GIC Dist
378 <0x0 0x06200000 0 0x200000>, // GICR (RD_base +
380 <0x0 0x0c0c0000 0 0x2000>, // GICC
381 <0x0 0x0c0d0000 0 0x1000>, // GICH
382 <0x0 0x0c0e0000 0 0x20000>; // GICV
393 reg = <0x0 0x6020000 0 0x20000>;
418 reg = <0x00000000 0x80000000 0 0x80000000>;
423 reg = <0x0 0x1080000 0x0 0x1000>;
430 reg = <0x0 0x1090000 0x0 0x1000>;
438 #clock-cells = <0>;
447 thermal-sensors = <&tmu 0>;
613 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
617 reg = <0x0 0x1ea0000 0x0 0x1e30>;
622 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
626 ranges = <0x0 0x00 0x8000000 0x100000>;
627 reg = <0x00 0x8000000 0x0 0x100000>;
633 compatible = "fsl,sec-v5.0-job-ring",
634 "fsl,sec-v4.0-job-ring";
635 reg = <0x10000 0x10000>;
640 compatible = "fsl,sec-v5.0-job-ring",
641 "fsl,sec-v4.0-job-ring";
642 reg = <0x20000 0x10000>;
647 compatible = "fsl,sec-v5.0-job-ring",
648 "fsl,sec-v4.0-job-ring";
649 reg = <0x30000 0x10000>;
654 compatible = "fsl,sec-v5.0-job-ring",
655 "fsl,sec-v4.0-job-ring";
656 reg = <0x40000 0x10000>;
663 reg = <0 0x1300000 0 0xa0000>;
670 reg = <0x0 0x1e00000 0x0 0x10000>;
676 reg = <0x0 0x1e80000 0x0 0x10000>;
684 reg = <0x0 0x1f70000 0x0 0x10000>;
688 ranges = <0x0 0x0 0x1f70000 0x10000>;
693 #address-cells = <0>;
695 reg = <0x14 4>;
697 <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
698 <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
699 <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
700 <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
701 <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
702 <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
703 <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
704 <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
705 <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
706 <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
707 <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
708 <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
709 interrupt-map-mask = <0xf 0x0>;
715 reg = <0x0 0x1f80000 0x0 0x10000>;
717 fsl,tmu-range = <0x800000e6 0x8001017d>;
720 <0x00000000 0x00000035
722 0x00000001 0x00000154>;
730 #size-cells = <0>;
731 reg = <0x0 0x2000000 0x0 0x10000>;
743 #size-cells = <0>;
744 reg = <0x0 0x2010000 0x0 0x10000>;
755 #size-cells = <0>;
756 reg = <0x0 0x2020000 0x0 0x10000>;
767 #size-cells = <0>;
768 reg = <0x0 0x2030000 0x0 0x10000>;
779 #size-cells = <0>;
780 reg = <0x0 0x2040000 0x0 0x10000>;
792 #size-cells = <0>;
793 reg = <0x0 0x2050000 0x0 0x10000>;
804 #size-cells = <0>;
805 reg = <0x0 0x2060000 0x0 0x10000>;
816 #size-cells = <0>;
817 reg = <0x0 0x2070000 0x0 0x10000>;
828 #size-cells = <0>;
829 reg = <0x0 0x20c0000 0x0 0x10000>,
830 <0x0 0x20000000 0x0 0x10000000>;
844 #size-cells = <0>;
845 reg = <0x0 0x2100000 0x0 0x10000>;
851 bus-num = <0>;
858 #size-cells = <0>;
859 reg = <0x0 0x2110000 0x0 0x10000>;
872 #size-cells = <0>;
873 reg = <0x0 0x2120000 0x0 0x10000>;
885 reg = <0x0 0x2140000 0x0 0x10000>;
886 interrupts = <0 28 0x4>; /* Level high type */
899 reg = <0x0 0x2150000 0x0 0x10000>;
900 interrupts = <0 63 0x4>; /* Level high type */
914 reg = <0x0 0x2180000 0x0 0x10000>;
918 <&clockgen QORIQ_CLK_SYSCLK 0>;
920 fsl,clk-source = /bits/ 8 <0>;
926 reg = <0x0 0x2190000 0x0 0x10000>;
930 <&clockgen QORIQ_CLK_SYSCLK 0>;
932 fsl,clk-source = /bits/ 8 <0>;
938 reg = <0x0 0x21c0000 0x0 0x1000>;
946 reg = <0x0 0x21d0000 0x0 0x1000>;
954 reg = <0x0 0x21e0000 0x0 0x1000>;
962 reg = <0x0 0x21f0000 0x0 0x1000>;
970 reg = <0x0 0x2300000 0x0 0x10000>;
981 reg = <0x0 0x2310000 0x0 0x10000>;
992 reg = <0x0 0x2320000 0x0 0x10000>;
1003 reg = <0x0 0x2330000 0x0 0x10000>;
1014 reg = <0x0 0x23a0000 0 0x1000>,
1015 <0x0 0x2390000 0 0x1000>;
1022 reg = <0x0 0x1e34040 0x0 0x1c>;
1029 reg = <0x0 0x2800000 0x0 0x10000>;
1030 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1036 reg = <0x0 0x3100000 0x0 0x10000>;
1039 snps,quirk-frame-length-adjustment = <0x20>;
1048 reg = <0x0 0x3110000 0x0 0x10000>;
1051 snps,quirk-frame-length-adjustment = <0x20>;
1060 reg = <0x0 0x3200000 0x0 0x10000>,
1061 <0x7 0x100520 0x0 0x4>;
1072 reg = <0x0 0x3210000 0x0 0x10000>,
1073 <0x7 0x100520 0x0 0x4>;
1084 reg = <0x0 0x3220000 0x0 0x10000>,
1085 <0x7 0x100520 0x0 0x4>;
1096 reg = <0x0 0x3230000 0x0 0x10000>,
1097 <0x7 0x100520 0x0 0x4>;
1108 reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
1109 <0x80 0x00000000 0x0 0x00002000>; /* configuration space */
1121 bus-range = <0x0 0xff>;
1122 … ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1125 interrupt-map-mask = <0 0 0 7>;
1126 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
1127 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
1128 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
1129 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1130 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1136 reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
1137 <0x88 0x00000000 0x0 0x00002000>; /* configuration space */
1149 bus-range = <0x0 0xff>;
1150 … ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1153 interrupt-map-mask = <0 0 0 7>;
1154 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
1155 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
1156 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1157 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1158 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1164 reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
1165 <0x90 0x00000000 0x0 0x00002000>; /* configuration space */
1177 bus-range = <0x0 0xff>;
1178 … ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1181 interrupt-map-mask = <0 0 0 7>;
1182 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
1183 <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1184 <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1185 <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
1186 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1192 reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */
1193 <0x98 0x00000000 0x0 0x00002000>; /* configuration space */
1205 bus-range = <0x0 0xff>;
1206 … ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1209 interrupt-map-mask = <0 0 0 7>;
1210 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1211 <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1212 <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1213 <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1214 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1220 reg = <0x00 0x03800000 0x0 0x00100000>, /* controller registers */
1221 <0xa0 0x00000000 0x0 0x00002000>; /* configuration space */
1233 bus-range = <0x0 0xff>;
1234 … ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1237 interrupt-map-mask = <0 0 0 7>;
1238 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
1239 <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
1240 <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
1241 <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
1242 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1248 reg = <0x00 0x03900000 0x0 0x00100000>, /* controller registers */
1249 <0xa8 0x00000000 0x0 0x00002000>; /* configuration space */
1261 bus-range = <0x0 0xff>;
1262 … ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1265 interrupt-map-mask = <0 0 0 7>;
1266 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1267 <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
1268 <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
1269 <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1270 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1276 reg = <0 0x5000000 0 0x800000>;
1287 // performance counter interrupts 0-9
1368 reg = <0x00000000 0x08340020 0 0x2>;
1373 reg = <0x0 0x8b95000 0x0 0x100>;
1380 /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
1383 reg = <0x0 0x8b96000 0x0 0x1000>;
1386 #size-cells = <0>;
1396 reg = <0x0 0x8b97000 0x0 0x1000>;
1400 #size-cells = <0>;
1409 reg = <0x0 0x8c07000 0x0 0x1000>;
1412 #size-cells = <0>;
1415 pcs1: ethernet-phy@0 {
1416 reg = <0>;
1422 reg = <0x0 0x8c0b000 0x0 0x1000>;
1425 #size-cells = <0>;
1428 pcs2: ethernet-phy@0 {
1429 reg = <0>;
1435 reg = <0x0 0x8c0f000 0x0 0x1000>;
1438 #size-cells = <0>;
1441 pcs3: ethernet-phy@0 {
1442 reg = <0>;
1448 reg = <0x0 0x8c13000 0x0 0x1000>;
1451 #size-cells = <0>;
1454 pcs4: ethernet-phy@0 {
1455 reg = <0>;
1461 reg = <0x0 0x8c17000 0x0 0x1000>;
1464 #size-cells = <0>;
1467 pcs5: ethernet-phy@0 {
1468 reg = <0>;
1474 reg = <0x0 0x8c1b000 0x0 0x1000>;
1477 #size-cells = <0>;
1480 pcs6: ethernet-phy@0 {
1481 reg = <0>;
1487 reg = <0x0 0x8c1f000 0x0 0x1000>;
1490 #size-cells = <0>;
1493 pcs7: ethernet-phy@0 {
1494 reg = <0>;
1500 reg = <0x0 0x8c23000 0x0 0x1000>;
1503 #size-cells = <0>;
1506 pcs8: ethernet-phy@0 {
1507 reg = <0>;
1513 reg = <0x0 0x8c27000 0x0 0x1000>;
1516 #size-cells = <0>;
1519 pcs9: ethernet-phy@0 {
1520 reg = <0>;
1526 reg = <0x0 0x8c2b000 0x0 0x1000>;
1529 #size-cells = <0>;
1532 pcs10: ethernet-phy@0 {
1533 reg = <0>;
1539 reg = <0x0 0x8c2f000 0x0 0x1000>;
1542 #size-cells = <0>;
1545 pcs11: ethernet-phy@0 {
1546 reg = <0>;
1552 reg = <0x0 0x8c33000 0x0 0x1000>;
1555 #size-cells = <0>;
1558 pcs12: ethernet-phy@0 {
1559 reg = <0>;
1565 reg = <0x0 0x8c37000 0x0 0x1000>;
1568 #size-cells = <0>;
1571 pcs13: ethernet-phy@0 {
1572 reg = <0>;
1578 reg = <0x0 0x8c3b000 0x0 0x1000>;
1581 #size-cells = <0>;
1584 pcs14: ethernet-phy@0 {
1585 reg = <0>;
1591 reg = <0x0 0x8c3f000 0x0 0x1000>;
1594 #size-cells = <0>;
1597 pcs15: ethernet-phy@0 {
1598 reg = <0>;
1604 reg = <0x0 0x8c43000 0x0 0x1000>;
1607 #size-cells = <0>;
1610 pcs16: ethernet-phy@0 {
1611 reg = <0>;
1617 reg = <0x0 0x8c47000 0x0 0x1000>;
1620 #size-cells = <0>;
1623 pcs17: ethernet-phy@0 {
1624 reg = <0>;
1630 reg = <0x0 0x8c4b000 0x0 0x1000>;
1633 #size-cells = <0>;
1636 pcs18: ethernet-phy@0 {
1637 reg = <0>;
1643 reg = <0x00000008 0x0c000000 0 0x40>,
1644 <0x00000000 0x08340000 0 0x40000>;
1647 iommu-map = <0 &smmu 0 0>;
1653 * Region type 0x0 - MC portals
1654 * Region type 0x1 - QBMAN portals
1656 ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
1657 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
1664 #size-cells = <0>;
1668 reg = <0x1>;
1674 reg = <0x2>;
1680 reg = <0x3>;
1686 reg = <0x4>;
1692 reg = <0x5>;
1698 reg = <0x6>;
1704 reg = <0x7>;
1710 reg = <0x8>;
1716 reg = <0x9>;
1722 reg = <0xa>;
1728 reg = <0xb>;
1734 reg = <0xc>;
1740 reg = <0xd>;
1746 reg = <0xe>;
1752 reg = <0xf>;
1758 reg = <0x10>;
1764 reg = <0x11>;
1770 reg = <0x12>;