Lines Matching +full:0 +full:x40000000
16 cpu0: cpu@0 {
19 reg = <0x0>;
20 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
29 reg = <0x1>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
39 reg = <0x100>;
49 reg = <0x101>;
59 reg = <0x200>;
69 reg = <0x201>;
79 reg = <0x300>;
89 reg = <0x301>;
115 arm,psci-suspend-param = <0x0>;
124 reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
125 <0x20 0x00000000 0x0 0x00002000>; /* configuration space */
127 ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000
128 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>;
133 reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
134 <0x28 0x00000000 0x0 0x00002000>; /* configuration space */
136 ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000
137 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>;
142 reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
143 <0x30 0x00000000 0x0 0x00002000>; /* configuration space */
145 ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000
146 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>;
151 reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */
152 <0x38 0x00000000 0x0 0x00002000>; /* configuration space */
154 ranges = <0x81000000 0x0 0x00000000 0x38 0x00010000 0x0 0x00010000
155 0x82000000 0x0 0x40000000 0x38 0x40000000 0x0 0x40000000>;