Lines Matching +full:i2c +full:- +full:polling
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 * We expect the enable-method for cpu's to be "psci", but this
43 * Currently supported enable-method is psci v0.2
47 compatible = "arm,cortex-a53";
50 next-level-cache = <&l2>;
51 cpu-idle-states = <&CPU_PH20>;
52 #cooling-cells = <2>;
57 compatible = "arm,cortex-a53";
60 next-level-cache = <&l2>;
61 cpu-idle-states = <&CPU_PH20>;
62 #cooling-cells = <2>;
67 compatible = "arm,cortex-a53";
70 next-level-cache = <&l2>;
71 cpu-idle-states = <&CPU_PH20>;
72 #cooling-cells = <2>;
77 compatible = "arm,cortex-a53";
80 next-level-cache = <&l2>;
81 cpu-idle-states = <&CPU_PH20>;
82 #cooling-cells = <2>;
85 l2: l2-cache {
90 idle-states {
92 * PSCI node is not added default, U-boot will add missing
95 entry-method = "psci";
97 CPU_PH20: cpu-ph20 {
98 compatible = "arm,idle-state";
99 idle-state-name = "PH20";
100 arm,psci-suspend-param = <0x0>;
101 entry-latency-us = <1000>;
102 exit-latency-us = <1000>;
103 min-residency-us = <3000>;
113 reserved-memory {
114 #address-cells = <2>;
115 #size-cells = <2>;
118 bman_fbpr: bman-fbpr {
119 compatible = "shared-dma-pool";
122 no-map;
125 qman_fqd: qman-fqd {
126 compatible = "shared-dma-pool";
129 no-map;
132 qman_pfdr: qman-pfdr {
133 compatible = "shared-dma-pool";
136 no-map;
141 compatible = "fixed-clock";
142 #clock-cells = <0>;
143 clock-frequency = <100000000>;
144 clock-output-names = "sysclk";
148 compatible = "syscon-reboot";
154 thermal-zones {
155 ddr-controller {
156 polling-delay-passive = <1000>;
157 polling-delay = <5000>;
158 thermal-sensors = <&tmu 0>;
161 ddr-ctrler-alert {
167 ddr-ctrler-crit {
176 polling-delay-passive = <1000>;
177 polling-delay = <5000>;
178 thermal-sensors = <&tmu 1>;
181 serdes-alert {
187 serdes-crit {
196 polling-delay-passive = <1000>;
197 polling-delay = <5000>;
198 thermal-sensors = <&tmu 2>;
201 fman-alert {
207 fman-crit {
215 core-cluster {
216 polling-delay-passive = <1000>;
217 polling-delay = <5000>;
218 thermal-sensors = <&tmu 3>;
221 core_cluster_alert: core-cluster-alert {
227 core_cluster_crit: core-cluster-crit {
234 cooling-maps {
237 cooling-device =
247 polling-delay-passive = <1000>;
248 polling-delay = <5000>;
249 thermal-sensors = <&tmu 4>;
252 sec-alert {
258 sec-crit {
268 compatible = "arm,armv8-timer";
270 <1 14 0xf08>, /* Physical Non-Secure PPI */
273 fsl,erratum-a008585;
277 compatible = "arm,armv8-pmuv3";
282 interrupt-affinity = <&cpu0>,
288 gic: interrupt-controller@1400000 {
289 compatible = "arm,gic-400";
290 #interrupt-cells = <3>;
291 interrupt-controller;
300 compatible = "simple-bus";
301 #address-cells = <2>;
302 #size-cells = <2>;
304 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
305 dma-coherent;
308 compatible = "fsl,ls1043a-clockgen";
310 #clock-cells = <2>;
315 compatible = "fsl,ls1043a-scfg", "syscon";
317 big-endian;
318 #address-cells = <1>;
319 #size-cells = <1>;
322 extirq: interrupt-controller@1ac {
323 compatible = "fsl,ls1043a-extirq";
324 #interrupt-cells = <2>;
325 #address-cells = <0>;
326 interrupt-controller;
328 interrupt-map =
341 interrupt-map-mask = <0xf 0x0>;
346 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
347 "fsl,sec-v4.0";
348 fsl,sec-era = <3>;
349 #address-cells = <1>;
350 #size-cells = <1>;
354 dma-coherent;
357 compatible = "fsl,sec-v5.4-job-ring",
358 "fsl,sec-v5.0-job-ring",
359 "fsl,sec-v4.0-job-ring";
365 compatible = "fsl,sec-v5.4-job-ring",
366 "fsl,sec-v5.0-job-ring",
367 "fsl,sec-v4.0-job-ring";
373 compatible = "fsl,sec-v5.4-job-ring",
374 "fsl,sec-v5.0-job-ring",
375 "fsl,sec-v4.0-job-ring";
381 compatible = "fsl,sec-v5.4-job-ring",
382 "fsl,sec-v5.0-job-ring",
383 "fsl,sec-v4.0-job-ring";
390 compatible = "fsl,ls1021a-sfp";
394 clock-names = "sfp";
398 compatible = "fsl,ls1043a-dcfg", "syscon";
400 big-endian;
403 ifc: memory-controller@1530000 {
410 compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
411 #address-cells = <1>;
412 #size-cells = <0>;
415 reg-names = "QuadSPI", "QuadSPI-memory";
417 clock-names = "qspi_en", "qspi";
426 compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
429 clock-frequency = <0>;
430 voltage-ranges = <1800 1800 3300 3300>;
431 sdhci,auto-cmd12;
432 big-endian;
433 bus-width = <4>;
436 ddr: memory-controller@1080000 {
437 compatible = "fsl,qoriq-memory-controller";
440 big-endian;
444 compatible = "fsl,qoriq-tmu";
447 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
448 fsl,tmu-calibration = <0x00000000 0x00000023
488 #thermal-sensor-cells = <1>;
495 memory-region = <&qman_fqd &qman_pfdr>;
502 memory-region = <&bman_fbpr>;
505 bportals: bman-portals@508000000 {
509 qportals: qman-portals@500000000 {
514 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
515 #address-cells = <1>;
516 #size-cells = <0>;
519 clock-names = "dspi";
522 spi-num-chipselects = <5>;
523 big-endian;
528 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
529 #address-cells = <1>;
530 #size-cells = <0>;
533 clock-names = "dspi";
536 spi-num-chipselects = <5>;
537 big-endian;
541 i2c0: i2c@2180000 {
542 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
543 #address-cells = <1>;
544 #size-cells = <0>;
547 clock-names = "i2c";
552 dma-names = "rx", "tx";
556 i2c1: i2c@2190000 {
557 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
558 #address-cells = <1>;
559 #size-cells = <0>;
562 clock-names = "i2c";
565 scl-gpios = <&gpio4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
569 i2c2: i2c@21a0000 {
570 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
571 #address-cells = <1>;
572 #size-cells = <0>;
575 clock-names = "i2c";
578 scl-gpios = <&gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
582 i2c3: i2c@21b0000 {
583 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
584 #address-cells = <1>;
585 #size-cells = <0>;
588 clock-names = "i2c";
591 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
628 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
631 gpio-controller;
632 #gpio-cells = <2>;
633 interrupt-controller;
634 #interrupt-cells = <2>;
638 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
641 gpio-controller;
642 #gpio-cells = <2>;
643 interrupt-controller;
644 #interrupt-cells = <2>;
648 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
651 gpio-controller;
652 #gpio-cells = <2>;
653 interrupt-controller;
654 #interrupt-cells = <2>;
658 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
661 gpio-controller;
662 #gpio-cells = <2>;
663 interrupt-controller;
664 #interrupt-cells = <2>;
668 #address-cells = <1>;
669 #size-cells = <1>;
670 compatible = "fsl,qe", "simple-bus";
673 brg-frequency = <100000000>;
674 bus-frequency = <200000000>;
675 fsl,qe-num-riscs = <1>;
676 fsl,qe-num-snums = <28>;
679 compatible = "fsl,qe-ic";
681 #address-cells = <0>;
682 interrupt-controller;
683 #interrupt-cells = <1>;
689 #address-cells = <1>;
690 #size-cells = <0>;
691 compatible = "fsl,ls1043-qe-si",
692 "fsl,t1040-qe-si";
697 #address-cells = <1>;
698 #size-cells = <1>;
699 compatible = "fsl,ls1043-qe-siram",
700 "fsl,t1040-qe-siram";
705 cell-index = <1>;
708 interrupt-parent = <&qeic>;
712 cell-index = <3>;
715 interrupt-parent = <&qeic>;
719 #address-cells = <1>;
720 #size-cells = <1>;
721 compatible = "fsl,qe-muram", "fsl,cpm-muram";
724 data-only@0 {
725 compatible = "fsl,qe-muram-data",
726 "fsl,cpm-muram-data";
733 compatible = "fsl,ls1021a-lpuart";
737 clock-names = "ipg";
742 compatible = "fsl,ls1021a-lpuart";
747 clock-names = "ipg";
752 compatible = "fsl,ls1021a-lpuart";
757 clock-names = "ipg";
762 compatible = "fsl,ls1021a-lpuart";
767 clock-names = "ipg";
772 compatible = "fsl,ls1021a-lpuart";
777 clock-names = "ipg";
782 compatible = "fsl,ls1021a-lpuart";
787 clock-names = "ipg";
792 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
797 clock-names = "wdog";
798 big-endian;
801 edma0: dma-controller@2c00000 {
802 #dma-cells = <2>;
803 compatible = "fsl,vf610-edma";
809 interrupt-names = "edma-tx", "edma-err";
810 dma-channels = <32>;
811 big-endian;
812 clock-names = "dmamux0", "dmamux1";
820 #address-cells = <2>;
821 #size-cells = <2>;
822 compatible = "simple-bus";
824 dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
831 snps,quirk-frame-length-adjustment = <0x20>;
833 usb3-lpm-capable;
834 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
843 snps,quirk-frame-length-adjustment = <0x20>;
845 usb3-lpm-capable;
846 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
855 snps,quirk-frame-length-adjustment = <0x20>;
857 usb3-lpm-capable;
858 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
863 compatible = "fsl,ls1043a-ahci";
866 reg-names = "ahci", "sata-ecc";
870 dma-coherent;
874 msi1: msi-controller1@1571000 {
875 compatible = "fsl,ls1043a-msi";
877 msi-controller;
881 msi2: msi-controller2@1572000 {
882 compatible = "fsl,ls1043a-msi";
884 msi-controller;
888 msi3: msi-controller3@1573000 {
889 compatible = "fsl,ls1043a-msi";
891 msi-controller;
896 compatible = "fsl,ls1043a-pcie";
899 reg-names = "regs", "config";
902 interrupt-names = "pme", "aer";
903 #address-cells = <3>;
904 #size-cells = <2>;
906 num-viewport = <6>;
907 bus-range = <0x0 0xff>;
909 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
910 msi-parent = <&msi1>, <&msi2>, <&msi3>;
911 #interrupt-cells = <1>;
912 interrupt-map-mask = <0 0 0 7>;
913 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
917 fsl,pcie-scfg = <&scfg 0>;
918 big-endian;
923 compatible = "fsl,ls1043a-pcie";
926 reg-names = "regs", "config";
929 interrupt-names = "pme", "aer";
930 #address-cells = <3>;
931 #size-cells = <2>;
933 num-viewport = <6>;
934 bus-range = <0x0 0xff>;
936 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
937 msi-parent = <&msi1>, <&msi2>, <&msi3>;
938 #interrupt-cells = <1>;
939 interrupt-map-mask = <0 0 0 7>;
940 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
944 fsl,pcie-scfg = <&scfg 1>;
945 big-endian;
950 compatible = "fsl,ls1043a-pcie";
953 reg-names = "regs", "config";
956 interrupt-names = "pme", "aer";
957 #address-cells = <3>;
958 #size-cells = <2>;
960 num-viewport = <6>;
961 bus-range = <0x0 0xff>;
963 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
964 msi-parent = <&msi1>, <&msi2>, <&msi3>;
965 #interrupt-cells = <1>;
966 interrupt-map-mask = <0 0 0 7>;
967 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
971 fsl,pcie-scfg = <&scfg 2>;
972 big-endian;
976 qdma: dma-controller@8380000 {
977 compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
986 interrupt-names = "qdma-error", "qdma-queue0",
987 "qdma-queue1", "qdma-queue2", "qdma-queue3";
988 dma-channels = <8>;
989 block-number = <1>;
990 block-offset = <0x10000>;
991 fsl,dma-queues = <2>;
992 status-sizes = <64>;
993 queue-sizes = <64 64>;
994 big-endian;
997 rcpm: power-controller@1ee2140 {
998 compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
1000 #fsl,rcpm-wakeup-cells = <1>;
1004 compatible = "fsl,ls1043a-ftm-alarm";
1006 fsl,rcpm-wakeup = <&rcpm 0x20000>;
1008 big-endian;
1014 compatible = "linaro,optee-tz";
1021 #include "qoriq-qman-portals.dtsi"
1022 #include "qoriq-bman-portals.dtsi"