Lines Matching +full:gic +full:- +full:its
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 compatible = "arm,cortex-a72";
29 enable-method = "psci";
31 next-level-cache = <&l2>;
32 cpu-idle-states = <&CPU_PW20>;
33 #cooling-cells = <2>;
38 compatible = "arm,cortex-a72";
40 enable-method = "psci";
42 next-level-cache = <&l2>;
43 cpu-idle-states = <&CPU_PW20>;
44 #cooling-cells = <2>;
47 l2: l2-cache {
52 idle-states {
54 * PSCI node is not added default, U-boot will add missing
57 entry-method = "psci";
59 CPU_PW20: cpu-pw20 {
60 compatible = "arm,idle-state";
61 idle-state-name = "PW20";
62 arm,psci-suspend-param = <0x0>;
63 entry-latency-us = <2000>;
64 exit-latency-us = <2000>;
65 min-residency-us = <6000>;
69 rtc_clk: rtc-clk {
70 compatible = "fixed-clock";
71 #clock-cells = <0>;
72 clock-frequency = <32768>;
73 clock-output-names = "rtc_clk";
77 compatible = "fixed-clock";
78 #clock-cells = <0>;
79 clock-frequency = <100000000>;
80 clock-output-names = "sysclk";
83 osc_27m: clock-osc-27m {
84 compatible = "fixed-clock";
85 #clock-cells = <0>;
86 clock-frequency = <27000000>;
87 clock-output-names = "phy_27m";
92 compatible = "linaro,optee-tz";
99 compatible = "syscon-reboot";
106 compatible = "arm,armv8-timer";
118 compatible = "arm,cortex-a72-pmu";
122 gic: interrupt-controller@6000000 { label
123 compatible = "arm,gic-v3";
124 #address-cells = <2>;
125 #size-cells = <2>;
127 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
128 <0x0 0x06040000 0 0x40000>; /* GIC Redistributor */
129 #interrupt-cells = <3>;
130 interrupt-controller;
133 its: gic-its@6020000 { label
134 compatible = "arm,gic-v3-its";
135 msi-controller;
136 reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */
140 thermal-zones {
141 ddr-controller {
142 polling-delay-passive = <1000>;
143 polling-delay = <5000>;
144 thermal-sensors = <&tmu 0>;
147 ddr-ctrler-alert {
153 ddr-ctrler-crit {
161 core-cluster {
162 polling-delay-passive = <1000>;
163 polling-delay = <5000>;
164 thermal-sensors = <&tmu 1>;
167 core_cluster_alert: core-cluster-alert {
173 core_cluster_crit: core-cluster-crit {
180 cooling-maps {
183 cooling-device =
192 compatible = "simple-bus";
193 #address-cells = <2>;
194 #size-cells = <2>;
197 ddr: memory-controller@1080000 {
198 compatible = "fsl,qoriq-memory-controller";
201 little-endian;
205 #address-cells = <1>;
206 #size-cells = <1>;
207 compatible = "fsl,ls1028a-dcfg", "syscon", "simple-mfd";
210 little-endian;
212 fspi_clk: clock-controller@900 {
213 compatible = "fsl,ls1028a-flexspi-clk";
215 #clock-cells = <0>;
217 clock-output-names = "fspi_clk";
224 little-endian;
228 compatible = "fsl,ls1028a-sfp";
232 clock-names = "sfp";
233 #address-cells = <1>;
234 #size-cells = <1>;
236 ls1028a_uid: unique-id@1c {
242 compatible = "fsl,ls1028a-scfg", "syscon";
244 big-endian;
247 clockgen: clock-controller@1300000 {
248 compatible = "fsl,ls1028a-clockgen";
250 #clock-cells = <2>;
255 compatible = "fsl,vf610-i2c";
256 #address-cells = <1>;
257 #size-cells = <0>;
266 compatible = "fsl,vf610-i2c";
267 #address-cells = <1>;
268 #size-cells = <0>;
277 compatible = "fsl,vf610-i2c";
278 #address-cells = <1>;
279 #size-cells = <0>;
288 compatible = "fsl,vf610-i2c";
289 #address-cells = <1>;
290 #size-cells = <0>;
299 compatible = "fsl,vf610-i2c";
300 #address-cells = <1>;
301 #size-cells = <0>;
310 compatible = "fsl,vf610-i2c";
311 #address-cells = <1>;
312 #size-cells = <0>;
321 compatible = "fsl,vf610-i2c";
322 #address-cells = <1>;
323 #size-cells = <0>;
332 compatible = "fsl,vf610-i2c";
333 #address-cells = <1>;
334 #size-cells = <0>;
343 compatible = "nxp,lx2160a-fspi";
344 #address-cells = <1>;
345 #size-cells = <0>;
348 reg-names = "fspi_base", "fspi_mmap";
351 clock-names = "fspi_en", "fspi";
356 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
357 #address-cells = <1>;
358 #size-cells = <0>;
361 clock-names = "dspi";
365 dma-names = "tx", "rx";
366 spi-num-chipselects = <4>;
367 little-endian;
372 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
373 #address-cells = <1>;
374 #size-cells = <0>;
377 clock-names = "dspi";
381 dma-names = "tx", "rx";
382 spi-num-chipselects = <4>;
383 little-endian;
388 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
389 #address-cells = <1>;
390 #size-cells = <0>;
393 clock-names = "dspi";
397 dma-names = "tx", "rx";
398 spi-num-chipselects = <3>;
399 little-endian;
404 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
407 clock-frequency = <0>; /* fixed up by bootloader */
409 voltage-ranges = <1800 1800 3300 3300>;
410 sdhci,auto-cmd12;
411 little-endian;
412 bus-width = <4>;
417 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
420 clock-frequency = <0>; /* fixed up by bootloader */
422 voltage-ranges = <1800 1800>;
423 sdhci,auto-cmd12;
424 non-removable;
425 little-endian;
426 bus-width = <4>;
431 compatible = "fsl,lx2160ar1-flexcan";
438 clock-names = "ipg", "per";
443 compatible = "fsl,lx2160ar1-flexcan";
450 clock-names = "ipg", "per";
474 compatible = "fsl,ls1028a-lpuart";
479 clock-names = "ipg";
480 dma-names = "rx","tx";
487 compatible = "fsl,ls1028a-lpuart";
492 clock-names = "ipg";
493 dma-names = "rx","tx";
500 compatible = "fsl,ls1028a-lpuart";
505 clock-names = "ipg";
506 dma-names = "rx","tx";
513 compatible = "fsl,ls1028a-lpuart";
518 clock-names = "ipg";
519 dma-names = "rx","tx";
526 compatible = "fsl,ls1028a-lpuart";
531 clock-names = "ipg";
532 dma-names = "rx","tx";
539 compatible = "fsl,ls1028a-lpuart";
544 clock-names = "ipg";
545 dma-names = "rx","tx";
551 edma0: dma-controller@22c0000 {
552 #dma-cells = <2>;
553 compatible = "fsl,ls1028a-edma", "fsl,vf610-edma";
559 interrupt-names = "edma-tx", "edma-err";
560 dma-channels = <32>;
561 clock-names = "dmamux0", "dmamux1";
569 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
572 gpio-controller;
573 #gpio-cells = <2>;
574 interrupt-controller;
575 #interrupt-cells = <2>;
576 little-endian;
580 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
583 gpio-controller;
584 #gpio-cells = <2>;
585 interrupt-controller;
586 #interrupt-cells = <2>;
587 little-endian;
591 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
594 gpio-controller;
595 #gpio-cells = <2>;
596 interrupt-controller;
597 #interrupt-cells = <2>;
598 little-endian;
602 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
606 snps,quirk-frame-length-adjustment = <0x20>;
607 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
612 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
616 snps,quirk-frame-length-adjustment = <0x20>;
617 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
622 compatible = "fsl,ls1028a-ahci";
625 reg-names = "ahci", "sata-ecc";
633 compatible = "fsl,ls1028a-pcie";
636 reg-names = "regs", "config";
639 interrupt-names = "pme", "aer";
640 #address-cells = <3>;
641 #size-cells = <2>;
643 dma-coherent;
644 num-viewport = <8>;
645 bus-range = <0x0 0xff>;
647 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
648 msi-parent = <&its>;
649 #interrupt-cells = <1>;
650 interrupt-map-mask = <0 0 0 7>;
651 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
652 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
653 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
654 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
655 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
659 pcie_ep1: pcie-ep@3400000 {
660 compatible = "fsl,ls1028a-pcie-ep","fsl,ls-pcie-ep";
663 reg-names = "regs", "addr_space";
665 interrupt-names = "pme";
666 num-ib-windows = <6>;
667 num-ob-windows = <8>;
672 compatible = "fsl,ls1028a-pcie";
675 reg-names = "regs", "config";
678 interrupt-names = "pme", "aer";
679 #address-cells = <3>;
680 #size-cells = <2>;
682 dma-coherent;
683 num-viewport = <8>;
684 bus-range = <0x0 0xff>;
686 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
687 msi-parent = <&its>;
688 #interrupt-cells = <1>;
689 interrupt-map-mask = <0 0 0 7>;
690 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
691 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
692 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
693 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
694 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
698 pcie_ep2: pcie-ep@3500000 {
699 compatible = "fsl,ls1028a-pcie-ep","fsl,ls-pcie-ep";
702 reg-names = "regs", "addr_space";
704 interrupt-names = "pme";
705 num-ib-windows = <6>;
706 num-ob-windows = <8>;
711 compatible = "arm,mmu-500";
713 #global-interrupts = <8>;
714 #iommu-cells = <1>;
715 stream-match-mask = <0x7c00>;
720 /* global non-secure fault */
722 /* combined non-secure interrupt */
724 /* performance counter interrupts 0-7 */
763 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
764 fsl,sec-era = <10>;
765 #address-cells = <1>;
766 #size-cells = <1>;
770 dma-coherent;
773 compatible = "fsl,sec-v5.0-job-ring",
774 "fsl,sec-v4.0-job-ring";
780 compatible = "fsl,sec-v5.0-job-ring",
781 "fsl,sec-v4.0-job-ring";
787 compatible = "fsl,sec-v5.0-job-ring",
788 "fsl,sec-v4.0-job-ring";
794 compatible = "fsl,sec-v5.0-job-ring",
795 "fsl,sec-v4.0-job-ring";
801 qdma: dma-controller@8380000 {
802 compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
811 interrupt-names = "qdma-error", "qdma-queue0",
812 "qdma-queue1", "qdma-queue2", "qdma-queue3";
813 dma-channels = <8>;
814 block-number = <1>;
815 block-offset = <0x10000>;
816 fsl,dma-queues = <2>;
817 status-sizes = <64>;
818 queue-sizes = <64 64>;
828 clock-names = "wdog_clk", "apb_pclk";
838 clock-names = "wdog_clk", "apb_pclk";
842 compatible = "arm,mali-dp500";
846 interrupt-names = "DE", "SE";
851 clock-names = "pxlclk", "mclk", "aclk", "pclk";
852 arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
853 arm,malidp-arqos-value = <0xd000d000>;
869 clock-names = "core", "shader", "bus";
870 #cooling-cells = <2>;
873 sai1: audio-controller@f100000 {
874 #sound-dai-cells = <0>;
875 compatible = "fsl,vf610-sai";
886 clock-names = "bus", "mclk1", "mclk2", "mclk3";
887 dma-names = "tx", "rx";
890 fsl,sai-asynchronous;
894 sai2: audio-controller@f110000 {
895 #sound-dai-cells = <0>;
896 compatible = "fsl,vf610-sai";
907 clock-names = "bus", "mclk1", "mclk2", "mclk3";
908 dma-names = "tx", "rx";
911 fsl,sai-asynchronous;
915 sai3: audio-controller@f120000 {
916 #sound-dai-cells = <0>;
917 compatible = "fsl,vf610-sai";
928 clock-names = "bus", "mclk1", "mclk2", "mclk3";
929 dma-names = "tx", "rx";
932 fsl,sai-asynchronous;
936 sai4: audio-controller@f130000 {
937 #sound-dai-cells = <0>;
938 compatible = "fsl,vf610-sai";
949 clock-names = "bus", "mclk1", "mclk2", "mclk3";
950 dma-names = "tx", "rx";
953 fsl,sai-asynchronous;
957 sai5: audio-controller@f140000 {
958 #sound-dai-cells = <0>;
959 compatible = "fsl,vf610-sai";
970 clock-names = "bus", "mclk1", "mclk2", "mclk3";
971 dma-names = "tx", "rx";
974 fsl,sai-asynchronous;
978 sai6: audio-controller@f150000 {
979 #sound-dai-cells = <0>;
980 compatible = "fsl,vf610-sai";
991 clock-names = "bus", "mclk1", "mclk2", "mclk3";
992 dma-names = "tx", "rx";
995 fsl,sai-asynchronous;
999 dpclk: clock-controller@f1f0000 {
1000 compatible = "fsl,ls1028a-plldig";
1002 #clock-cells = <0>;
1007 compatible = "fsl,qoriq-tmu";
1010 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
1011 fsl,tmu-calibration = <0x00000000 0x00000024
1054 little-endian;
1055 #thermal-sensor-cells = <1>;
1059 compatible = "pci-host-ecam-generic";
1061 #address-cells = <3>;
1062 #size-cells = <2>;
1063 msi-parent = <&its>;
1065 bus-range = <0x0 0x0>;
1066 dma-coherent;
1067 msi-map = <0 &its 0x17 0xe>;
1068 iommu-map = <0 &smmu 0x17 0xe>;
1069 /* PF0-6 BAR0 - non-prefetchable memory */
1071 /* PF0-6 BAR2 - prefetchable memory */
1073 /* PF0: VF0-1 BAR0 - non-prefetchable memory */
1075 /* PF0: VF0-1 BAR2 - prefetchable memory */
1077 /* PF1: VF0-1 BAR0 - non-prefetchable memory */
1079 /* PF1: VF0-1 BAR2 - prefetchable memory */
1081 /* BAR4 (PF5) - non-prefetchable memory */
1099 phy-mode = "internal";
1102 fixed-link {
1104 full-duplex;
1110 compatible = "fsl,enetc-mdio";
1112 #address-cells = <1>;
1113 #size-cells = <0>;
1117 compatible = "fsl,enetc-ptp";
1120 little-endian;
1121 fsl,extts-fifo;
1124 mscc_felix: ethernet-switch@0,5 {
1131 #address-cells = <1>;
1132 #size-cells = <0>;
1158 phy-mode = "internal";
1162 fixed-link {
1164 full-duplex;
1171 phy-mode = "internal";
1175 fixed-link {
1177 full-duplex;
1187 phy-mode = "internal";
1190 fixed-link {
1192 full-duplex;
1206 compatible = "fsl,ls1028a-enetc-ierb";
1211 compatible = "fsl,vf610-ftm-pwm";
1212 #pwm-cells = <3>;
1214 clock-names = "ftm_sys", "ftm_ext",
1222 compatible = "fsl,vf610-ftm-pwm";
1223 #pwm-cells = <3>;
1225 clock-names = "ftm_sys", "ftm_ext",
1233 compatible = "fsl,vf610-ftm-pwm";
1234 #pwm-cells = <3>;
1236 clock-names = "ftm_sys", "ftm_ext",
1244 compatible = "fsl,vf610-ftm-pwm";
1245 #pwm-cells = <3>;
1247 clock-names = "ftm_sys", "ftm_ext",
1255 compatible = "fsl,vf610-ftm-pwm";
1256 #pwm-cells = <3>;
1258 clock-names = "ftm_sys", "ftm_ext",
1266 compatible = "fsl,vf610-ftm-pwm";
1267 #pwm-cells = <3>;
1269 clock-names = "ftm_sys", "ftm_ext",
1277 compatible = "fsl,vf610-ftm-pwm";
1278 #pwm-cells = <3>;
1280 clock-names = "ftm_sys", "ftm_ext",
1288 compatible = "fsl,vf610-ftm-pwm";
1289 #pwm-cells = <3>;
1291 clock-names = "ftm_sys", "ftm_ext",
1298 rcpm: power-controller@1e34040 {
1299 compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
1301 #fsl,rcpm-wakeup-cells = <7>;
1302 little-endian;
1306 compatible = "fsl,ls1028a-ftm-alarm";
1308 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1314 compatible = "fsl,ls1028a-ftm-alarm";
1316 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;