Lines Matching +full:0 +full:x10060000
52 #clock-cells = <0>;
57 #size-cells = <0>;
91 cpu0: cpu@0 {
94 reg = <0x0>;
100 reg = <0x1>;
106 reg = <0x2>;
112 reg = <0x3>;
118 reg = <0x100>;
124 reg = <0x101>;
130 reg = <0x102>;
136 reg = <0x103>;
156 soc: soc@0 {
160 ranges = <0x0 0x0 0x0 0x20000000>;
164 reg = <0x10000000 0x100>;
170 reg = <0x10040000 0x800>;
190 #address-cells = <0>;
191 reg = <0x12a01000 0x1000>,
192 <0x12a02000 0x2000>,
193 <0x12a04000 0x2000>,
194 <0x12a06000 0x2000>;
202 reg = <0x11860000 0x10000>;
208 offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
209 mask = <0x2>; /* SWRESET_SYSTEM */
210 value = <0x2>; /* reset value */
216 reg = <0x10050000 0x100>;
221 samsung,cluster-index = <0>;
227 reg = <0x10060000 0x100>;
238 reg = <0x10030000 0x8000>;
250 reg = <0x11800000 0x8000>;
259 reg = <0x11c00000 0x8000>;
268 reg = <0x12000000 0x8000>;
282 reg = <0x120e0000 0x8000>;
291 reg = <0x12c00000 0x8000>;
306 reg = <0x13000000 0x8000>;
315 reg = <0x13400000 0x8000>;
328 reg = <0x14500000 0x8000>;
342 reg = <0x14a00000 0x8000>;
351 reg = <0x11850000 0x1000>;
360 reg = <0x11c30000 0x1000>;
369 reg = <0x12070000 0x1000>;
375 reg = <0x13430000 0x1000>;
381 reg = <0x139b0000 0x1000>;
387 reg = <0x14a60000 0x1000>;
392 reg = <0x11a30000 0x100>;
402 reg = <0x12100000 0x2000>;
405 #size-cells = <0>;
409 fifo-depth = <0x40>;
415 reg = <0x13830000 0x100>;
418 #size-cells = <0>;
420 pinctrl-0 = <&i2c0_pins>;
428 reg = <0x13840000 0x100>;
431 #size-cells = <0>;
433 pinctrl-0 = <&i2c1_pins>;
441 reg = <0x13850000 0x100>;
444 #size-cells = <0>;
446 pinctrl-0 = <&i2c2_pins>;
454 reg = <0x13860000 0x100>;
457 #size-cells = <0>;
459 pinctrl-0 = <&i2c3_pins>;
467 reg = <0x13870000 0x100>;
470 #size-cells = <0>;
472 pinctrl-0 = <&i2c4_pins>;
481 reg = <0x13880000 0x100>;
484 #size-cells = <0>;
486 pinctrl-0 = <&i2c5_pins>;
495 reg = <0x13890000 0x100>;
498 #size-cells = <0>;
500 pinctrl-0 = <&i2c6_pins>;
508 reg = <0x12c50000 0x9000>;
512 #iommu-cells = <0>;
517 reg = <0x130c0000 0x9000>;
521 #iommu-cells = <0>;
526 reg = <0x14550000 0x9000>;
530 #iommu-cells = <0>;
535 reg = <0x14570000 0x9000>;
539 #iommu-cells = <0>;
544 reg = <0x14850000 0x9000>;
548 #iommu-cells = <0>;
553 reg = <0x10020000 0x10000>;
559 reg = <0x11c20000 0x10000>;
565 reg = <0x138200c0 0x20>;
566 samsung,sysreg = <&sysreg_peri 0x1010>;
578 reg = <0x13820000 0xc0>;
581 pinctrl-0 = <&uart0_pins>;
591 reg = <0x138a00c0 0x20>;
592 samsung,sysreg = <&sysreg_peri 0x1020>;
604 reg = <0x138a0000 0xc0>;
607 #size-cells = <0>;
609 pinctrl-0 = <&hsi2c0_pins>;
619 reg = <0x138b00c0 0x20>;
620 samsung,sysreg = <&sysreg_peri 0x1030>;
632 reg = <0x138b0000 0xc0>;
635 #size-cells = <0>;
637 pinctrl-0 = <&hsi2c1_pins>;
647 reg = <0x138c00c0 0x20>;
648 samsung,sysreg = <&sysreg_peri 0x1040>;
660 reg = <0x138c0000 0xc0>;
663 #size-cells = <0>;
665 pinctrl-0 = <&hsi2c2_pins>;
675 reg = <0x139400c0 0x20>;
676 samsung,sysreg = <&sysreg_peri 0x1050>;
689 reg = <0x11d000c0 0x20>;
690 samsung,sysreg = <&sysreg_cmgp 0x2000>;
702 reg = <0x11d00000 0xc0>;
705 #size-cells = <0>;
707 pinctrl-0 = <&hsi2c3_pins>;
716 reg = <0x11d00000 0xc0>;
719 pinctrl-0 = <&uart1_single_pins>;
729 reg = <0x11d200c0 0x20>;
730 samsung,sysreg = <&sysreg_cmgp 0x2010>;
742 reg = <0x11d20000 0xc0>;
745 #size-cells = <0>;
747 pinctrl-0 = <&hsi2c4_pins>;
756 reg = <0x11d20000 0xc0>;
759 pinctrl-0 = <&uart2_single_pins>;