Lines Matching +full:0 +full:x10060000
45 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu_atlas0: cpu@0 {
55 reg = <0x0>;
57 i-cache-size = <0xc000>;
60 d-cache-size = <0x8000>;
69 reg = <0x1>;
71 i-cache-size = <0xc000>;
74 d-cache-size = <0x8000>;
83 reg = <0x2>;
85 i-cache-size = <0xc000>;
88 d-cache-size = <0x8000>;
97 reg = <0x3>;
99 i-cache-size = <0xc000>;
102 d-cache-size = <0x8000>;
110 cache-size = <0x200000>;
119 cpu_off = <0x84000002>;
120 cpu_on = <0xC4000003>;
123 soc: soc@0 {
127 ranges = <0 0 0 0x18000000>;
131 reg = <0x10000000 0x100>;
137 #address-cells = <0>;
139 reg = <0x11001000 0x1000>,
140 <0x11002000 0x2000>,
141 <0x11004000 0x2000>,
142 <0x11006000 0x2000>;
147 reg = <0x10E10000 0x1000>;
156 reg = <0x10EB0000 0x1000>;
165 reg = <0x10570000 0x10000>;
171 reg = <0x105d0000 0xb000>;
185 reg = <0x105e0000 0xb000>;
198 reg = <0x105b0000 0xd00>;
206 reg = <0x13610000 0xd00>;
216 reg = <0x14c80000 0xd00>;
248 reg = <0x10040000 0xd00>;
256 reg = <0x10e90000 0xd00>;
266 reg = <0x156e0000 0xd00>;
282 reg = <0x13630000 0x100>;
292 reg = <0x14c20000 0x100>;
302 reg = <0x14c30000 0x100>;
312 reg = <0x14c40000 0x100>;
322 reg = <0x10580000 0x1000>;
333 reg = <0x13470000 0x1000>;
339 reg = <0x14cd0000 0x1000>;
345 reg = <0x14ce0000 0x1000>;
351 reg = <0x14c90000 0x1000>;
357 reg = <0x14ca0000 0x1000>;
363 reg = <0x10e60000 0x1000>;
369 reg = <0x15690000 0x1000>;
375 reg = <0x14870000 0x1000>;
381 reg = <0x13640000 0x1000>;
384 #size-cells = <0>;
386 pinctrl-0 = <&hs_i2c0_bus>;
394 reg = <0x13650000 0x1000>;
397 #size-cells = <0>;
399 pinctrl-0 = <&hs_i2c1_bus>;
407 reg = <0x14e60000 0x1000>;
410 #size-cells = <0>;
412 pinctrl-0 = <&hs_i2c2_bus>;
420 reg = <0x14e70000 0x1000>;
423 #size-cells = <0>;
425 pinctrl-0 = <&hs_i2c3_bus>;
433 reg = <0x13660000 0x1000>;
436 #size-cells = <0>;
438 pinctrl-0 = <&hs_i2c4_bus>;
446 reg = <0x13670000 0x1000>;
449 #size-cells = <0>;
451 pinctrl-0 = <&hs_i2c5_bus>;
459 reg = <0x14e00000 0x1000>;
462 #size-cells = <0>;
464 pinctrl-0 = <&hs_i2c6_bus>;
472 reg = <0x13e10000 0x1000>;
475 #size-cells = <0>;
477 pinctrl-0 = <&hs_i2c7_bus>;
485 reg = <0x14e20000 0x1000>;
488 #size-cells = <0>;
490 pinctrl-0 = <&hs_i2c8_bus>;
498 reg = <0x13680000 0x1000>;
501 #size-cells = <0>;
503 pinctrl-0 = <&hs_i2c9_bus>;
511 reg = <0x13690000 0x1000>;
514 #size-cells = <0>;
516 pinctrl-0 = <&hs_i2c10_bus>;
524 reg = <0x136a0000 0x1000>;
527 #size-cells = <0>;
529 pinctrl-0 = <&hs_i2c11_bus>;
537 reg = <0x105c0000 0x5000>;
542 reg = <0x10590000 0x100>;
552 reg = <0x101d0000 0x100>;
562 reg = <0x14ac0000 0x5000>;
575 #size-cells = <0>;
576 reg = <0x15740000 0x2000>;
580 fifo-depth = <0x40>;
588 #size-cells = <0>;
589 reg = <0x15750000 0x2000>;
593 fifo-depth = <0x40>;
601 #size-cells = <0>;
602 reg = <0x15560000 0x2000>;
606 fifo-depth = <0x40>;
612 reg = <0x13620000 0x100>;
622 reg = <0x136c0000 0x100>;
628 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
636 reg = <0x10060000 0x200>;
641 #thermal-sensor-cells = <0>;
646 reg = <0x15570000 0x100>, /* 0: HCI standard */
647 <0x15570100 0x100>, /* 1: Vendor specificed */
648 <0x15571000 0x200>, /* 2: UNIPRO */
649 <0x15572000 0x300>; /* 3: UFS protector */
655 freq-table-hz = <0 0>, <0 0>;
657 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
665 reg = <0x15571800 0x240>;
668 #phy-cells = <0>;
680 reg = <0x15500000 0x100>;
704 reg = <0x15400000 0x10000>;
706 phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>;
714 polling-delay-passive = <0>; /* milliseconds */
715 polling-delay = <0>; /* milliseconds */