Lines Matching +full:psci +full:- +full:1
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <0>;
21 compatible = "brcm,brahma-b53";
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
28 B53_1: cpu@1 {
29 compatible = "brcm,brahma-b53";
32 next-level-cache = <&L2_0>;
33 enable-method = "psci";
37 compatible = "brcm,brahma-b53";
40 next-level-cache = <&L2_0>;
41 enable-method = "psci";
45 compatible = "brcm,brahma-b53";
48 next-level-cache = <&L2_0>;
49 enable-method = "psci";
52 L2_0: l2-cache0 {
58 compatible = "arm,armv8-timer";
66 compatible = "arm,cortex-a53-pmu";
71 interrupt-affinity = <&B53_0>, <&B53_1>,
76 periph_clk: periph-clk {
77 compatible = "fixed-clock";
78 #clock-cells = <0>;
79 clock-frequency = <200000000>;
81 uart_clk: uart-clk {
82 compatible = "fixed-factor-clock";
83 #clock-cells = <0>;
85 clock-div = <4>;
86 clock-mult = <1>;
90 psci {
91 compatible = "arm,psci-0.2";
96 compatible = "simple-bus";
97 #address-cells = <1>;
98 #size-cells = <1>;
101 gic: interrupt-controller@1000 {
102 compatible = "arm,gic-400";
103 #interrupt-cells = <3>;
104 interrupt-controller;
114 compatible = "simple-bus";
115 #address-cells = <1>;
116 #size-cells = <1>;
124 clock-names = "uartclk", "apb_pclk";