Lines Matching +full:1 +full:b500000

14 		#address-cells = <1>;
15 		#size-cells = <1>;
19 			frame-number = <1>;
31 		#mbox-cells = <1>;
41 		#iommu-cells = <1>;
42 		#global-interrupts = <1>;
43 		power-domains = <&scpi_devpd 1>;
48 	smmu_pcie: iommu@2b500000 {
53 		#iommu-cells = <1>;
54 		#global-interrupts = <1>;
64 		#iommu-cells = <1>;
65 		#global-interrupts = <1>;
76 		#address-cells = <1>;
78 		#size-cells = <1>;
179 			#address-cells = <1>;
189 			port@1 {
190 				reg = <1>;
242 			#address-cells = <1>;
253 			port@1 {
254 				reg = <1>;
321 			#address-cells = <1>;
331 			port@1 {
332 				reg = <1>;
430 			#address-cells = <1>;
440 			port@1 {
441 				reg = <1>;
580 		#address-cells = <1>;
587 			arm,trig-out-sigs = <0 1>;
592 		trig-conns@1 {
593 			reg = <1>;
594 			arm,trig-in-sigs = <0 1>;
627 		#address-cells = <1>;
639 		trig-conns@1 {
640 			reg = <1>;
648 			arm,trig-out-sigs = <1 6>;
662 		power-domains = <&scpi_devpd 1>;
673 		#address-cells = <1>;
674 		#size-cells = <1>;
703 		#interrupt-cells = <1>;
705 		interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
717 		mboxes = <&mailbox 1>;
725 				#clock-cells = <1>;
726 				clock-indices = <0>, <1>, <2>;
729 			scpi_clk: clocks-1 {
731 				#clock-cells = <1>;
740 			#power-domain-cells = <1>;
745 			#thermal-sensor-cells = <1>;
810 		#iommu-cells = <1>;
811 		#global-interrupts = <1>;
820 		#iommu-cells = <1>;
821 		#global-interrupts = <1>;
829 		#iommu-cells = <1>;
830 		#global-interrupts = <1>;
838 		#iommu-cells = <1>;
839 		#global-interrupts = <1>;
846 		#dma-cells = <1>;
857 			 <&smmu_dma 1>,
910 		#address-cells = <1>;
971 		#interrupt-cells = <1>;
974 				<0 0  1 &gic 0 GIC_SPI  69 IRQ_TYPE_LEVEL_HIGH>,
990 		#address-cells = <1>;
991 		#size-cells = <1>;
993 		#interrupt-cells = <1>;