Lines Matching +full:smmu +full:- +full:v3

1 // SPDX-License-Identifier: GPL-2.0
5 * Architecture Envelope Model (AEM) ARMv8-A
11 /dts-v1/;
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include "rtsm_ve-motherboard.dtsi"
18 #include "rtsm_ve-motherboard-rs2.dtsi"
22 compatible = "arm,fvp-base-revc", "arm,vexpress";
23 interrupt-parent = <&gic>;
24 #address-cells = <2>;
25 #size-cells = <2>;
37 compatible = "arm,psci-0.2";
42 #address-cells = <2>;
43 #size-cells = <0>;
49 enable-method = "psci";
55 enable-method = "psci";
61 enable-method = "psci";
67 enable-method = "psci";
73 enable-method = "psci";
79 enable-method = "psci";
85 enable-method = "psci";
91 enable-method = "psci";
101 reserved-memory {
102 #address-cells = <2>;
103 #size-cells = <2>;
109 compatible = "shared-dma-pool";
111 no-map;
115 gic: interrupt-controller@2f000000 {
116 compatible = "arm,gic-v3";
117 #interrupt-cells = <3>;
118 #address-cells = <2>;
119 #size-cells = <2>;
121 interrupt-controller;
129 its: msi-controller@2f020000 {
130 #msi-cells = <1>;
131 compatible = "arm,gic-v3-its";
133 msi-controller;
138 compatible = "arm,armv8-timer";
146 compatible = "arm,armv8-pmuv3";
150 spe-pmu {
151 compatible = "arm,statistical-profiling-extension-v1";
156 #address-cells = <0x3>;
157 #size-cells = <0x2>;
158 #interrupt-cells = <0x1>;
159 compatible = "pci-host-ecam-generic";
161 bus-range = <0x0 0x1>;
164 interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
168 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
169 msi-map = <0x0 &its 0x0 0x10000>;
170 iommu-map = <0x0 &smmu 0x0 0x10000>;
172 dma-coherent;
175 smmu: iommu@2b400000 { label
176 compatible = "arm,smmu-v3";
182 interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
183 dma-coherent;
184 #iommu-cells = <1>;
185 msi-parent = <&its 0x10000>;
189 compatible = "arm,rtsm-display";
192 remote-endpoint = <&clcd_pads>;
198 #interrupt-cells = <1>;
199 interrupt-map-mask = <0 0 63>;
200 interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,