Lines Matching +full:mdio +full:- +full:mux +full:- +full:1
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
26 clock-names = "usb_ctrl", "ddr";
32 phy-names = "usb2-phy0", "usb2-phy1";
35 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
39 clock-names = "otg";
42 g-rx-fifo-size = <192>;
43 g-np-tx-fifo-size = <128>;
44 g-tx-fifo-size = <128 128 16 16 16>;
52 maximum-speed = "high-speed";
57 acodec: audio-controller@c8832000 {
60 #sound-dai-cells = <0>;
61 sound-name-prefix = "ACODEC";
63 clock-names = "pclk";
69 compatible = "amlogic,gxl-crypto";
74 clock-names = "blkmv";
81 compatible = "amlogic,aiu-gxl", "amlogic,aiu";
91 clock-names = "pclk",
105 compatible = "amlogic,meson-gxl-usb2-phy";
106 #phy-cells = <0>;
109 clock-names = "phy";
111 reset-names = "phy";
116 compatible = "amlogic,meson-gxl-usb2-phy";
117 #phy-cells = <0>;
120 clock-names = "phy";
122 reset-names = "phy";
136 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
138 mdio0: mdio {
139 #address-cells = <1>;
140 #size-cells = <0>;
141 compatible = "snps,dwmac-mdio";
147 compatible = "amlogic,meson-gxl-aobus-pinctrl";
148 #address-cells = <2>;
149 #size-cells = <2>;
156 reg-names = "mux", "pull", "gpio";
157 gpio-controller;
158 #gpio-cells = <2>;
159 gpio-ranges = <&pinctrl_aobus 0 0 14>;
163 mux {
166 bias-disable;
171 mux {
175 bias-disable;
180 mux {
183 bias-disable;
188 mux {
191 bias-disable;
196 mux {
200 bias-disable;
205 mux {
208 bias-disable;
213 mux {
217 bias-disable;
222 mux {
225 bias-disable;
230 mux {
233 bias-disable;
238 mux {
241 bias-disable;
246 mux {
249 bias-disable;
254 mux {
257 bias-disable;
262 mux {
265 bias-disable;
270 mux {
273 bias-disable;
278 mux {
281 bias-disable;
286 mux {
289 bias-disable;
294 mux {
297 bias-disable;
305 clock-names = "core";
309 compatible = "amlogic,meson-gxl-aoclkc", "amlogic,meson-gx-aoclkc";
311 clock-names = "xtal", "mpeg-clk";
315 compatible = "amlogic,meson-gpio-intc",
316 "amlogic,meson-gxl-gpio-intc";
321 compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
325 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
329 clock-names = "isfr", "iahb", "venci";
333 clkc: clock-controller {
334 compatible = "amlogic,gxl-clkc";
335 #clock-cells = <1>;
337 clock-names = "xtal";
343 clock-names = "core";
364 compatible = "amlogic,meson-gxl-periphs-pinctrl";
365 #address-cells = <2>;
366 #size-cells = <2>;
374 reg-names = "mux", "pull", "pull-enable", "gpio";
375 gpio-controller;
376 #gpio-cells = <2>;
377 gpio-ranges = <&pinctrl_periphs 0 0 100>;
381 mux-0 {
385 bias-pull-up;
388 mux-1 {
391 bias-disable;
395 emmc_ds_pins: emmc-ds {
396 mux {
399 bias-pull-down;
404 mux {
407 bias-pull-down;
412 mux {
418 bias-disable;
422 spi_pins: spi-pins {
423 mux {
428 bias-disable;
432 spi_ss0_pins: spi-ss0 {
433 mux {
436 bias-disable;
441 mux-0 {
448 bias-pull-up;
451 mux-1 {
454 bias-disable;
459 mux {
462 bias-pull-down;
467 mux-0 {
474 bias-pull-up;
477 mux-1 {
480 bias-disable;
485 mux {
488 bias-pull-down;
493 mux {
496 bias-disable;
501 mux {
505 bias-disable;
510 mux {
514 bias-disable;
519 mux {
523 bias-disable;
528 mux {
532 bias-disable;
537 mux {
541 bias-disable;
546 mux {
550 bias-disable;
555 mux {
559 bias-disable;
564 mux {
568 bias-disable;
573 mux {
577 bias-disable;
582 mux {
586 bias-disable;
591 mux {
607 bias-disable;
612 mux {
615 bias-disable;
620 mux {
627 mux {
630 bias-disable;
635 mux {
638 bias-disable;
643 mux {
646 bias-disable;
651 mux {
654 bias-disable;
659 mux {
662 bias-disable;
667 mux {
670 bias-disable;
675 mux {
678 bias-disable;
683 mux {
686 bias-disable;
691 mux {
694 bias-disable;
699 mux {
702 bias-disable;
707 mux {
710 bias-disable;
715 mux {
718 bias-disable;
723 mux {
726 bias-disable;
730 mux {
733 bias-disable;
738 mux {
741 bias-disable;
746 mux {
749 bias-disable;
754 mux {
757 bias-disable;
762 eth-phy-mux {
763 compatible = "mdio-mux-mmioreg", "mdio-mux";
764 #address-cells = <1>;
765 #size-cells = <0>;
767 mux-mask = <0xffffffff>;
768 mdio-parent-bus = <&mdio0>;
770 internal_mdio: mdio@e40908ff {
772 #address-cells = <1>;
773 #size-cells = <0>;
775 internal_phy: ethernet-phy@8 {
776 compatible = "ethernet-phy-id0181.4400";
779 max-speed = <100>;
783 external_mdio: mdio@2009087f {
785 #address-cells = <1>;
786 #size-cells = <0>;
804 reset-names = "viu", "venc", "vcbus", "bt656",
809 clock-names = "vpu", "vapb";
813 * free mux to safely change frequency while running.
814 * Same for VAPB but with a final gate after the glitch free mux.
816 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
818 <&clkc CLKID_VPU>, /* Glitch free mux */
821 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
822 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
828 assigned-clock-rates = <0>, /* Do Nothing */
837 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
842 clock-names = "clkin", "core", "adc_clk", "adc_sel";
849 clock-names = "core", "clkin0", "clkin1";
857 clock-names = "core", "clkin0", "clkin1";
865 clock-names = "core", "clkin0", "clkin1";
877 clock-names = "core";
879 num-cs = <1>;
888 clock-names = "xtal", "pclk", "baud";
893 clock-names = "xtal", "pclk", "baud";
898 clock-names = "xtal", "pclk", "baud";
903 clock-names = "xtal", "pclk", "baud";
908 clock-names = "xtal", "pclk", "baud";
912 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
913 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
917 compatible = "amlogic,gxl-vdec", "amlogic,gx-vdec";
922 clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
924 reset-names = "esparser";