Lines Matching full:clkc
8 #include <dt-bindings/clock/gxbb-clkc.h>
25 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
38 clocks = <&clkc CLKID_USB1>;
62 clocks = <&clkc CLKID_ACODEC>;
73 clocks = <&clkc CLKID_BLKMV>;
82 clocks = <&clkc CLKID_AIU_GLUE>,
83 <&clkc CLKID_I2S_OUT>,
84 <&clkc CLKID_AOCLK_GATE>,
85 <&clkc CLKID_CTS_AMCLK>,
86 <&clkc CLKID_MIXER_IFACE>,
87 <&clkc CLKID_IEC958>,
88 <&clkc CLKID_IEC958_GATE>,
89 <&clkc CLKID_CTS_MCLK_I958>,
90 <&clkc CLKID_CTS_I958>;
108 clocks = <&clkc CLKID_USB>;
119 clocks = <&clkc CLKID_USB>;
128 clocks = <&clkc CLKID_EFUSE>;
132 clocks = <&clkc CLKID_ETH>,
133 <&clkc CLKID_FCLK_DIV2>,
134 <&clkc CLKID_MPLL2>,
135 <&clkc CLKID_FCLK_DIV2>;
310 clocks = <&xtal>, <&clkc CLKID_CLK81>;
326 clocks = <&clkc CLKID_HDMI_PCLK>,
327 <&clkc CLKID_CLK81>,
328 <&clkc CLKID_GCLK_VENCI_INT0>;
333 clkc: clock-controller { label
334 compatible = "amlogic,gxl-clkc";
342 clocks = <&clkc CLKID_RNG0>;
347 clocks = <&clkc CLKID_I2C>;
351 clocks = <&clkc CLKID_AO_I2C>;
355 clocks = <&clkc CLKID_I2C>;
359 clocks = <&clkc CLKID_I2C>;
807 clocks = <&clkc CLKID_VPU>,
808 <&clkc CLKID_VAPB>;
816 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
817 <&clkc CLKID_VPU_0>,
818 <&clkc CLKID_VPU>, /* Glitch free mux */
819 <&clkc CLKID_VAPB_0_SEL>,
820 <&clkc CLKID_VAPB_0>,
821 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
822 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
824 <&clkc CLKID_VPU_0>,
825 <&clkc CLKID_FCLK_DIV4>,
827 <&clkc CLKID_VAPB_0>;
839 <&clkc CLKID_SAR_ADC>,
840 <&clkc CLKID_SAR_ADC_CLK>,
841 <&clkc CLKID_SAR_ADC_SEL>;
846 clocks = <&clkc CLKID_SD_EMMC_A>,
847 <&clkc CLKID_SD_EMMC_A_CLK0>,
848 <&clkc CLKID_FCLK_DIV2>;
854 clocks = <&clkc CLKID_SD_EMMC_B>,
855 <&clkc CLKID_SD_EMMC_B_CLK0>,
856 <&clkc CLKID_FCLK_DIV2>;
862 clocks = <&clkc CLKID_SD_EMMC_C>,
863 <&clkc CLKID_SD_EMMC_C_CLK0>,
864 <&clkc CLKID_FCLK_DIV2>;
870 clocks = <&clkc CLKID_HDMI_PCLK>,
871 <&clkc CLKID_CLK81>,
872 <&clkc CLKID_GCLK_VENCI_INT0>;
876 clocks = <&clkc CLKID_SPICC>;
883 clocks = <&clkc CLKID_SPI>;
887 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
902 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
907 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
918 clocks = <&clkc CLKID_DOS_PARSER>,
919 <&clkc CLKID_DOS>,
920 <&clkc CLKID_VDEC_1>,
921 <&clkc CLKID_VDEC_HEVC>;