Lines Matching full:clkc
8 #include <dt-bindings/clock/g12a-clkc.h>
35 clocks = <&clkc CLKID_HDMI>,
36 <&clkc CLKID_HTX_PCLK>,
37 <&clkc CLKID_VPU_INTR>;
45 clocks = <&clkc CLKID_HDMI>,
46 <&clkc CLKID_HTX_PCLK>,
47 <&clkc CLKID_VPU_INTR>;
54 clocks = <&clkc CLKID_EFUSE>;
152 clocks = <&clkc CLKID_PCIE_PHY
153 &clkc CLKID_PCIE_COMB
154 &clkc CLKID_PCIE_PLL>;
176 clocks = <&clkc CLKID_ETH>,
177 <&clkc CLKID_FCLK_DIV2>,
178 <&clkc CLKID_MPLL2>,
179 <&clkc CLKID_FCLK_DIV2>;
208 clocks = <&clkc CLKID_HDMI>,
209 <&clkc CLKID_HTX_PCLK>,
210 <&clkc CLKID_VPU_INTR>;
242 clocks = <&clkc CLKID_RNG0>;
252 clocks = <&clkc CLKID_AUDIO_CODEC>;
1547 clocks = <&clkc CLKID_TS>;
1557 clocks = <&clkc CLKID_TS>;
1607 clkc: clock-controller { label
1608 compatible = "amlogic,g12a-clkc";
1632 clocks = <&clkc CLKID_VPU>,
1633 <&clkc CLKID_VAPB>;
1641 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1642 <&clkc CLKID_VPU_0>,
1643 <&clkc CLKID_VPU>, /* Glitch free mux */
1644 <&clkc CLKID_VAPB_0_SEL>,
1645 <&clkc CLKID_VAPB_0>,
1646 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1647 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1649 <&clkc CLKID_VPU_0>,
1650 <&clkc CLKID_FCLK_DIV4>,
1652 <&clkc CLKID_VAPB_0>;
1666 clocks = <&clkc CLKID_PCIE_PLL>;
1670 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1678 clocks = <&clkc CLKID_ETH_PHY>,
1680 <&clkc CLKID_MPLL_50M>;
1727 clocks = <&xtal>, <&clkc CLKID_CLK81>;
2069 clocks = <&clkc CLKID_I2C>;
2113 clocks = <&clkc CLKID_PARSER>,
2114 <&clkc CLKID_DOS>,
2115 <&clkc CLKID_VDEC_1>,
2116 <&clkc CLKID_VDEC_HEVC>,
2117 <&clkc CLKID_VDEC_HEVCF>;
2194 clocks = <&clkc CLKID_SPICC0>,
2195 <&clkc CLKID_SPICC0_SCLK>;
2206 clocks = <&clkc CLKID_SPICC1>,
2207 <&clkc CLKID_SPICC1_SCLK>;
2220 clocks = <&clkc CLKID_CLK81>;
2251 clocks = <&clkc CLKID_I2C>;
2261 clocks = <&clkc CLKID_I2C>;
2271 clocks = <&clkc CLKID_I2C>;
2281 clocks = <&clkc CLKID_I2C>;
2293 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2302 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2311 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2323 clocks = <&clkc CLKID_SD_EMMC_A>,
2324 <&clkc CLKID_SD_EMMC_A_CLK0>,
2325 <&clkc CLKID_FCLK_DIV2>;
2335 clocks = <&clkc CLKID_SD_EMMC_B>,
2336 <&clkc CLKID_SD_EMMC_B_CLK0>,
2337 <&clkc CLKID_FCLK_DIV2>;
2347 clocks = <&clkc CLKID_SD_EMMC_C>,
2348 <&clkc CLKID_SD_EMMC_C_CLK0>,
2349 <&clkc CLKID_FCLK_DIV2>;
2363 clocks = <&clkc CLKID_USB>;
2376 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2405 clocks = <&clkc CLKID_MALI>;