Lines Matching +full:0 +full:x200000
21 #size-cells = <0>;
23 cpu@0 {
26 reg = <0x0>;
28 d-cache-size = <0x8000>;
31 i-cache-size = <0xc000>;
40 reg = <0x1>;
42 d-cache-size = <0x8000>;
45 i-cache-size = <0xc000>;
54 reg = <0x2>;
56 d-cache-size = <0x8000>;
59 i-cache-size = <0xc000>;
68 reg = <0x3>;
70 d-cache-size = <0x8000>;
73 i-cache-size = <0xc000>;
82 reg = <0x100>;
84 d-cache-size = <0x8000>;
87 i-cache-size = <0xc000>;
96 reg = <0x101>;
98 d-cache-size = <0x8000>;
101 i-cache-size = <0xc000>;
110 reg = <0x102>;
112 d-cache-size = <0x8000>;
115 i-cache-size = <0xc000>;
124 reg = <0x103>;
126 d-cache-size = <0x8000>;
129 i-cache-size = <0xc000>;
138 reg = <0x200>;
140 d-cache-size = <0x8000>;
143 i-cache-size = <0xc000>;
152 reg = <0x201>;
154 d-cache-size = <0x8000>;
157 i-cache-size = <0xc000>;
166 reg = <0x202>;
168 d-cache-size = <0x8000>;
171 i-cache-size = <0xc000>;
180 reg = <0x203>;
182 d-cache-size = <0x8000>;
185 i-cache-size = <0xc000>;
194 reg = <0x300>;
196 d-cache-size = <0x8000>;
199 i-cache-size = <0xc000>;
208 reg = <0x301>;
210 d-cache-size = <0x8000>;
213 i-cache-size = <0xc000>;
222 reg = <0x302>;
224 d-cache-size = <0x8000>;
227 i-cache-size = <0xc000>;
236 reg = <0x303>;
238 d-cache-size = <0x8000>;
241 i-cache-size = <0xc000>;
247 cluster0_l2: cache@0 {
249 cache-size = <0x200000>;
257 cache-size = <0x200000>;
265 cache-size = <0x200000>;
273 cache-size = <0x200000>;
286 secmon@0 {
287 reg = <0x0 0x0 0x0 0x100000>;
321 reg = <0x0 0xf0800000 0 0x10000>, /* GICD */
322 <0x0 0xf0a00000 0 0x200000>, /* GICR */
323 <0x0 0xf0000000 0 0x2000>, /* GICC */
324 <0x0 0xf0010000 0 0x1000>, /* GICH */
325 <0x0 0xf0020000 0 0x2000>; /* GICV */
335 reg = <0x0 0xfbd00000 0x0 0x100000>;
336 interrupt-map-mask = <0xf800 0 0 7>;
338 interrupt-map = <0x4000 0 0 1 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
339 <0x4800 0 0 1 &gic 0 58 IRQ_TYPE_LEVEL_HIGH>,
340 <0x5000 0 0 1 &gic 0 59 IRQ_TYPE_LEVEL_HIGH>,
341 <0x5800 0 0 1 &gic 0 60 IRQ_TYPE_LEVEL_HIGH>,
342 <0x6000 0 0 1 &gic 0 61 IRQ_TYPE_LEVEL_HIGH>,
343 <0x6800 0 0 1 &gic 0 62 IRQ_TYPE_LEVEL_HIGH>,
344 <0x7000 0 0 1 &gic 0 63 IRQ_TYPE_LEVEL_HIGH>,
345 <0x7800 0 0 1 &gic 0 64 IRQ_TYPE_LEVEL_HIGH>;
346 ranges = <0x02000000 0x0 0xfe000000 0x0 0xfe000000 0x0 0x1000000>;
347 bus-range = <0x00 0x00>;
353 reg = <0x0 0xfbe00000 0x0 0x100000>;
365 ranges = <0x0 0x0 0xfc000000 0x2000000>;
369 reg = <0x1883000 0x1000>;
371 clock-frequency = <0>; /* Filled by firmware */
379 reg = <0x1884000 0x1000>;
381 clock-frequency = <0>; /* Filled by firmware */
389 reg = <0x1885000 0x1000>;
391 clock-frequency = <0>; /* Filled by firmware */
399 reg = <0x1886000 0x1000>;
401 clock-frequency = <0>; /* Filled by firmware */