Lines Matching +full:0 +full:- +full:4
1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 service_reserved: svcbuffer@0 {
22 compatible = "shared-dma-pool";
23 reg = <0x0 0x0 0x0 0x1000000>;
24 alignment = <0x1000>;
25 no-map;
30 #address-cells = <1>;
31 #size-cells = <0>;
33 cpu0: cpu@0 {
34 compatible = "arm,cortex-a53";
36 enable-method = "psci";
37 reg = <0x0>;
41 compatible = "arm,cortex-a53";
43 enable-method = "psci";
44 reg = <0x1>;
48 compatible = "arm,cortex-a53";
50 enable-method = "psci";
51 reg = <0x2>;
55 compatible = "arm,cortex-a53";
57 enable-method = "psci";
58 reg = <0x3>;
63 compatible = "arm,armv8-pmuv3";
64 interrupts = <0 170 4>,
65 <0 171 4>,
66 <0 172 4>,
67 <0 173 4>;
68 interrupt-affinity = <&cpu0>,
72 interrupt-parent = <&intc>;
76 compatible = "arm,psci-0.2";
82 compatible = "arm,armv8-timer";
83 interrupts = <1 13 0xf08>,
84 <1 14 0xf08>,
85 <1 11 0xf08>,
86 <1 10 0xf08>;
87 interrupt-parent = <&intc>;
90 intc: interrupt-controller@fffc1000 {
91 compatible = "arm,gic-400", "arm,cortex-a15-gic";
92 #interrupt-cells = <3>;
93 interrupt-controller;
94 reg = <0x0 0xfffc1000 0x0 0x1000>,
95 <0x0 0xfffc2000 0x0 0x2000>,
96 <0x0 0xfffc4000 0x0 0x2000>,
97 <0x0 0xfffc6000 0x0 0x2000>;
101 cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
102 #clock-cells = <0>;
103 compatible = "fixed-clock";
106 cb_intosc_ls_clk: cb-intosc-ls-clk {
107 #clock-cells = <0>;
108 compatible = "fixed-clock";
111 f2s_free_clk: f2s-free-clk {
112 #clock-cells = <0>;
113 compatible = "fixed-clock";
117 #clock-cells = <0>;
118 compatible = "fixed-clock";
121 qspi_clk: qspi-clk {
122 #clock-cells = <0>;
123 compatible = "fixed-clock";
124 clock-frequency = <200000000>;
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "simple-bus";
133 interrupt-parent = <&intc>;
134 ranges = <0 0 0 0xffffffff>;
137 #address-cells = <0x1>;
138 #size-cells = <0x1>;
140 compatible = "fpga-region";
141 fpga-mgr = <&fpga_mgr>;
144 clkmgr: clock-controller@ffd10000 {
145 compatible = "intel,stratix10-clkmgr";
146 reg = <0xffd10000 0x1000>;
147 #clock-cells = <1>;
151 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
152 reg = <0xff800000 0x2000>;
153 interrupts = <0 90 4>;
154 interrupt-names = "macirq";
155 mac-address = [00 00 00 00 00 00];
157 reset-names = "stmmaceth", "stmmaceth-ocp";
159 clock-names = "stmmaceth", "ptp_ref";
160 tx-fifo-depth = <16384>;
161 rx-fifo-depth = <16384>;
162 snps,multicast-filter-bins = <256>;
164 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
169 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
170 reg = <0xff802000 0x2000>;
171 interrupts = <0 91 4>;
172 interrupt-names = "macirq";
173 mac-address = [00 00 00 00 00 00];
175 reset-names = "stmmaceth", "stmmaceth-ocp";
177 clock-names = "stmmaceth", "ptp_ref";
178 tx-fifo-depth = <16384>;
179 rx-fifo-depth = <16384>;
180 snps,multicast-filter-bins = <256>;
182 altr,sysmgr-syscon = <&sysmgr 0x48 8>;
187 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
188 reg = <0xff804000 0x2000>;
189 interrupts = <0 92 4>;
190 interrupt-names = "macirq";
191 mac-address = [00 00 00 00 00 00];
193 reset-names = "stmmaceth", "stmmaceth-ocp";
195 clock-names = "stmmaceth", "ptp_ref";
196 tx-fifo-depth = <16384>;
197 rx-fifo-depth = <16384>;
198 snps,multicast-filter-bins = <256>;
200 altr,sysmgr-syscon = <&sysmgr 0x4c 16>;
205 #address-cells = <1>;
206 #size-cells = <0>;
207 compatible = "snps,dw-apb-gpio";
208 reg = <0xffc03200 0x100>;
212 porta: gpio-controller@0 {
213 compatible = "snps,dw-apb-gpio-port";
214 gpio-controller;
215 #gpio-cells = <2>;
217 reg = <0>;
218 interrupt-controller;
219 #interrupt-cells = <2>;
220 interrupts = <0 110 4>;
225 #address-cells = <1>;
226 #size-cells = <0>;
227 compatible = "snps,dw-apb-gpio";
228 reg = <0xffc03300 0x100>;
232 portb: gpio-controller@0 {
233 compatible = "snps,dw-apb-gpio-port";
234 gpio-controller;
235 #gpio-cells = <2>;
237 reg = <0>;
238 interrupt-controller;
239 #interrupt-cells = <2>;
240 interrupts = <0 111 4>;
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "snps,designware-i2c";
248 reg = <0xffc02800 0x100>;
249 interrupts = <0 103 4>;
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "snps,designware-i2c";
259 reg = <0xffc02900 0x100>;
260 interrupts = <0 104 4>;
267 #address-cells = <1>;
268 #size-cells = <0>;
269 compatible = "snps,designware-i2c";
270 reg = <0xffc02a00 0x100>;
271 interrupts = <0 105 4>;
278 #address-cells = <1>;
279 #size-cells = <0>;
280 compatible = "snps,designware-i2c";
281 reg = <0xffc02b00 0x100>;
282 interrupts = <0 106 4>;
289 #address-cells = <1>;
290 #size-cells = <0>;
291 compatible = "snps,designware-i2c";
292 reg = <0xffc02c00 0x100>;
293 interrupts = <0 107 4>;
300 #address-cells = <1>;
301 #size-cells = <0>;
302 compatible = "altr,socfpga-dw-mshc";
303 reg = <0xff808000 0x1000>;
304 interrupts = <0 96 4>;
305 fifo-depth = <0x400>;
307 reset-names = "reset";
310 clock-names = "biu", "ciu";
315 nand: nand-controller@ffb90000 {
316 #address-cells = <1>;
317 #size-cells = <0>;
318 compatible = "altr,socfpga-denali-nand";
319 reg = <0xffb90000 0x10000>,
320 <0xffb80000 0x1000>;
321 reg-names = "nand_data", "denali_reg";
322 interrupts = <0 97 4>;
326 clock-names = "nand", "nand_x", "ecc";
332 compatible = "mmio-sram";
333 reg = <0xffe00000 0x100000>;
336 pdma: dma-controller@ffda0000 {
338 reg = <0xffda0000 0x1000>;
339 interrupts = <0 81 4>,
340 <0 82 4>,
341 <0 83 4>,
342 <0 84 4>,
343 <0 85 4>,
344 <0 86 4>,
345 <0 87 4>,
346 <0 88 4>,
347 <0 89 4>;
348 #dma-cells = <1>;
350 clock-names = "apb_pclk";
352 reset-names = "dma", "dma-ocp";
356 #reset-cells = <1>;
357 compatible = "altr,stratix10-rst-mgr";
358 reg = <0xffd11000 0x1000>;
362 compatible = "arm,mmu-500", "arm,smmu-v2";
363 reg = <0xfa000000 0x40000>;
364 #global-interrupts = <2>;
365 #iommu-cells = <1>;
367 clock-names = "iommu";
368 interrupt-parent = <&intc>;
369 interrupts = <0 128 4>, /* Global Secure Fault */
370 <0 129 4>, /* Global Non-secure Fault */
371 /* Non-secure Context Interrupts (32) */
372 <0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>,
373 <0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>,
374 <0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>,
375 <0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>,
376 <0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>,
377 <0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>,
378 <0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>,
379 <0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>;
380 stream-match-mask = <0x7ff0>;
385 compatible = "snps,dw-apb-ssi";
386 #address-cells = <1>;
387 #size-cells = <0>;
388 reg = <0xffda4000 0x1000>;
389 interrupts = <0 99 4>;
391 reset-names = "spi";
392 reg-io-width = <4>;
393 num-cs = <4>;
399 compatible = "snps,dw-apb-ssi";
400 #address-cells = <1>;
401 #size-cells = <0>;
402 reg = <0xffda5000 0x1000>;
403 interrupts = <0 100 4>;
405 reset-names = "spi";
406 reg-io-width = <4>;
407 num-cs = <4>;
413 compatible = "altr,sys-mgr-s10","altr,sys-mgr";
414 reg = <0xffd12000 0x228>;
418 compatible = "snps,dw-apb-timer";
419 interrupts = <0 113 4>;
420 reg = <0xffc03000 0x100>;
422 clock-names = "timer";
426 compatible = "snps,dw-apb-timer";
427 interrupts = <0 114 4>;
428 reg = <0xffc03100 0x100>;
430 clock-names = "timer";
434 compatible = "snps,dw-apb-timer";
435 interrupts = <0 115 4>;
436 reg = <0xffd00000 0x100>;
438 clock-names = "timer";
442 compatible = "snps,dw-apb-timer";
443 interrupts = <0 116 4>;
444 reg = <0xffd00100 0x100>;
446 clock-names = "timer";
450 compatible = "snps,dw-apb-uart";
451 reg = <0xffc02000 0x100>;
452 interrupts = <0 108 4>;
453 reg-shift = <2>;
454 reg-io-width = <4>;
461 compatible = "snps,dw-apb-uart";
462 reg = <0xffc02100 0x100>;
463 interrupts = <0 109 4>;
464 reg-shift = <2>;
465 reg-io-width = <4>;
471 usbphy0: usbphy@0 {
472 #phy-cells = <0>;
473 compatible = "usb-nop-xceiv";
479 reg = <0xffb00000 0x40000>;
480 interrupts = <0 93 4>;
482 phy-names = "usb2-phy";
484 reset-names = "dwc2", "dwc2-ecc";
486 clock-names = "otg";
493 reg = <0xffb40000 0x40000>;
494 interrupts = <0 94 4>;
496 phy-names = "usb2-phy";
498 reset-names = "dwc2", "dwc2-ecc";
505 compatible = "snps,dw-wdt";
506 reg = <0xffd00200 0x100>;
507 interrupts = <0 117 4>;
514 compatible = "snps,dw-wdt";
515 reg = <0xffd00300 0x100>;
516 interrupts = <0 118 4>;
523 compatible = "snps,dw-wdt";
524 reg = <0xffd00400 0x100>;
525 interrupts = <0 125 4>;
532 compatible = "snps,dw-wdt";
533 reg = <0xffd00500 0x100>;
534 interrupts = <0 126 4>;
541 compatible = "altr,sdr-ctl", "syscon";
542 reg = <0xf8011100 0xc0>;
546 compatible = "altr,socfpga-s10-ecc-manager",
547 "altr,socfpga-a10-ecc-manager";
548 altr,sysmgr-syscon = <&sysmgr>;
549 #address-cells = <1>;
550 #size-cells = <1>;
551 interrupts = <0 15 4>;
552 interrupt-controller;
553 #interrupt-cells = <2>;
557 compatible = "altr,sdram-edac-s10";
558 altr,sdr-syscon = <&sdr>;
559 interrupts = <16 4>;
562 ocram-ecc@ff8cc000 {
563 compatible = "altr,socfpga-s10-ocram-ecc",
564 "altr,socfpga-a10-ocram-ecc";
565 reg = <0xff8cc000 0x100>;
566 altr,ecc-parent = <&ocram>;
567 interrupts = <1 4>;
570 usb0-ecc@ff8c4000 {
571 compatible = "altr,socfpga-s10-usb-ecc",
572 "altr,socfpga-usb-ecc";
573 reg = <0xff8c4000 0x100>;
574 altr,ecc-parent = <&usb0>;
575 interrupts = <2 4>;
578 emac0-rx-ecc@ff8c0000 {
579 compatible = "altr,socfpga-s10-eth-mac-ecc",
580 "altr,socfpga-eth-mac-ecc";
581 reg = <0xff8c0000 0x100>;
582 altr,ecc-parent = <&gmac0>;
583 interrupts = <4 4>;
586 emac0-tx-ecc@ff8c0400 {
587 compatible = "altr,socfpga-s10-eth-mac-ecc",
588 "altr,socfpga-eth-mac-ecc";
589 reg = <0xff8c0400 0x100>;
590 altr,ecc-parent = <&gmac0>;
591 interrupts = <5 4>;
597 compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
598 #address-cells = <1>;
599 #size-cells = <0>;
600 reg = <0xff8d2000 0x100>,
601 <0xff900000 0x100000>;
602 interrupts = <0 3 4>;
603 cdns,fifo-depth = <128>;
604 cdns,fifo-width = <4>;
605 cdns,trigger-address = <0x00000000>;
613 compatible = "intel,stratix10-svc";
615 memory-region = <&service_reserved>;
617 fpga_mgr: fpga-mgr {
618 compatible = "intel,stratix10-soc-fpga-mgr";