Lines Matching +full:sun8i +full:- +full:h3 +full:- +full:spi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h616-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/clock/sun6i-rtc.h>
10 #include <dt-bindings/reset/sun50i-h616-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
20 #size-cells = <0>;
23 compatible = "arm,cortex-a53";
26 enable-method = "psci";
31 compatible = "arm,cortex-a53";
34 enable-method = "psci";
39 compatible = "arm,cortex-a53";
42 enable-method = "psci";
47 compatible = "arm,cortex-a53";
50 enable-method = "psci";
55 reserved-memory {
56 #address-cells = <2>;
57 #size-cells = <2>;
61 * 256 KiB reserved for Trusted Firmware-A (BL31).
67 no-map;
71 osc24M: osc24M-clk {
72 #clock-cells = <0>;
73 compatible = "fixed-clock";
74 clock-frequency = <24000000>;
75 clock-output-names = "osc24M";
79 compatible = "arm,cortex-a53-pmu";
84 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
88 compatible = "arm,psci-0.2";
93 compatible = "arm,armv8-timer";
94 arm,no-tick-in-suspend;
106 compatible = "simple-bus";
107 #address-cells = <1>;
108 #size-cells = <1>;
112 compatible = "allwinner,sun50i-h616-system-control";
114 #address-cells = <1>;
115 #size-cells = <1>;
119 compatible = "mmio-sram";
121 #address-cells = <1>;
122 #size-cells = <1>;
128 compatible = "allwinner,sun50i-h616-ccu";
131 clock-names = "hosc", "losc", "iosc";
132 #clock-cells = <1>;
133 #reset-cells = <1>;
137 compatible = "allwinner,sun50i-h616-wdt",
138 "allwinner,sun6i-a31-wdt";
145 compatible = "allwinner,sun50i-h616-pinctrl";
156 clock-names = "apb", "hosc", "losc";
157 gpio-controller;
158 #gpio-cells = <3>;
159 interrupt-controller;
160 #interrupt-cells = <3>;
162 ext_rgmii_pins: rgmii-pins {
168 drive-strength = <40>;
171 i2c0_pins: i2c0-pins {
176 i2c3_ph_pins: i2c3-ph-pins {
181 ir_rx_pin: ir-rx-pin {
186 mmc0_pins: mmc0-pins {
190 drive-strength = <30>;
191 bias-pull-up;
194 /omit-if-no-ref/
195 mmc1_pins: mmc1-pins {
199 drive-strength = <30>;
200 bias-pull-up;
203 mmc2_pins: mmc2-pins {
208 drive-strength = <30>;
209 bias-pull-up;
212 /omit-if-no-ref/
213 spi0_pins: spi0-pins {
218 /omit-if-no-ref/
219 spi0_cs0_pin: spi0-cs0-pin {
224 /omit-if-no-ref/
225 spi1_pins: spi1-pins {
230 /omit-if-no-ref/
231 spi1_cs0_pin: spi1-cs0-pin {
236 uart0_ph_pins: uart0-ph-pins {
241 /omit-if-no-ref/
242 uart1_pins: uart1-pins {
247 /omit-if-no-ref/
248 uart1_rts_cts_pins: uart1-rts-cts-pins {
254 gic: interrupt-controller@3021000 {
255 compatible = "arm,gic-400";
261 interrupt-controller;
262 #interrupt-cells = <3>;
266 compatible = "allwinner,sun50i-h616-mmc",
267 "allwinner,sun50i-a100-mmc";
270 clock-names = "ahb", "mmc";
272 reset-names = "ahb";
274 pinctrl-names = "default";
275 pinctrl-0 = <&mmc0_pins>;
277 max-frequency = <150000000>;
278 cap-sd-highspeed;
279 cap-mmc-highspeed;
280 mmc-ddr-3_3v;
281 cap-sdio-irq;
282 #address-cells = <1>;
283 #size-cells = <0>;
287 compatible = "allwinner,sun50i-h616-mmc",
288 "allwinner,sun50i-a100-mmc";
291 clock-names = "ahb", "mmc";
293 reset-names = "ahb";
295 pinctrl-names = "default";
296 pinctrl-0 = <&mmc1_pins>;
298 max-frequency = <150000000>;
299 cap-sd-highspeed;
300 cap-mmc-highspeed;
301 mmc-ddr-3_3v;
302 cap-sdio-irq;
303 #address-cells = <1>;
304 #size-cells = <0>;
308 compatible = "allwinner,sun50i-h616-emmc",
309 "allwinner,sun50i-a100-emmc";
312 clock-names = "ahb", "mmc";
314 reset-names = "ahb";
316 pinctrl-names = "default";
317 pinctrl-0 = <&mmc2_pins>;
319 max-frequency = <150000000>;
320 cap-sd-highspeed;
321 cap-mmc-highspeed;
322 mmc-ddr-3_3v;
323 cap-sdio-irq;
324 #address-cells = <1>;
325 #size-cells = <0>;
329 compatible = "snps,dw-apb-uart";
332 reg-shift = <2>;
333 reg-io-width = <4>;
340 compatible = "snps,dw-apb-uart";
343 reg-shift = <2>;
344 reg-io-width = <4>;
351 compatible = "snps,dw-apb-uart";
354 reg-shift = <2>;
355 reg-io-width = <4>;
362 compatible = "snps,dw-apb-uart";
365 reg-shift = <2>;
366 reg-io-width = <4>;
373 compatible = "snps,dw-apb-uart";
376 reg-shift = <2>;
377 reg-io-width = <4>;
384 compatible = "snps,dw-apb-uart";
387 reg-shift = <2>;
388 reg-io-width = <4>;
395 compatible = "allwinner,sun50i-h616-i2c",
396 "allwinner,sun8i-v536-i2c",
397 "allwinner,sun6i-a31-i2c";
402 pinctrl-names = "default";
403 pinctrl-0 = <&i2c0_pins>;
405 #address-cells = <1>;
406 #size-cells = <0>;
410 compatible = "allwinner,sun50i-h616-i2c",
411 "allwinner,sun8i-v536-i2c",
412 "allwinner,sun6i-a31-i2c";
418 #address-cells = <1>;
419 #size-cells = <0>;
423 compatible = "allwinner,sun50i-h616-i2c",
424 "allwinner,sun8i-v536-i2c",
425 "allwinner,sun6i-a31-i2c";
431 #address-cells = <1>;
432 #size-cells = <0>;
436 compatible = "allwinner,sun50i-h616-i2c",
437 "allwinner,sun8i-v536-i2c",
438 "allwinner,sun6i-a31-i2c";
444 #address-cells = <1>;
445 #size-cells = <0>;
449 compatible = "allwinner,sun50i-h616-i2c",
450 "allwinner,sun8i-v536-i2c",
451 "allwinner,sun6i-a31-i2c";
457 #address-cells = <1>;
458 #size-cells = <0>;
461 spi0: spi@5010000 {
462 compatible = "allwinner,sun50i-h616-spi",
463 "allwinner,sun8i-h3-spi";
467 clock-names = "ahb", "mod";
470 #address-cells = <1>;
471 #size-cells = <0>;
474 spi1: spi@5011000 {
475 compatible = "allwinner,sun50i-h616-spi",
476 "allwinner,sun8i-h3-spi";
480 clock-names = "ahb", "mod";
483 #address-cells = <1>;
484 #size-cells = <0>;
488 compatible = "allwinner,sun50i-h616-emac0",
489 "allwinner,sun50i-a64-emac";
492 interrupt-names = "macirq";
494 clock-names = "stmmaceth";
496 reset-names = "stmmaceth";
501 compatible = "snps,dwmac-mdio";
502 #address-cells = <1>;
503 #size-cells = <0>;
508 compatible = "allwinner,sun50i-h616-rtc";
513 clock-names = "bus", "hosc",
514 "pll-32k";
515 #clock-cells = <1>;
519 compatible = "allwinner,sun50i-h616-r-ccu";
523 clock-names = "hosc", "losc", "iosc", "pll-periph";
524 #clock-cells = <1>;
525 #reset-cells = <1>;
529 compatible = "allwinner,sun50i-h616-r-pinctrl";
533 clock-names = "apb", "hosc", "losc";
534 gpio-controller;
535 #gpio-cells = <3>;
537 /omit-if-no-ref/
538 r_i2c_pins: r-i2c-pins {
543 r_rsb_pins: r-rsb-pins {
550 compatible = "allwinner,sun50i-h616-ir",
551 "allwinner,sun6i-a31-ir";
556 clock-names = "apb", "ir";
558 pinctrl-names = "default";
559 pinctrl-0 = <&ir_rx_pin>;
564 compatible = "allwinner,sun50i-h616-i2c",
565 "allwinner,sun8i-v536-i2c",
566 "allwinner,sun6i-a31-i2c";
572 #address-cells = <1>;
573 #size-cells = <0>;
577 compatible = "allwinner,sun50i-h616-rsb",
578 "allwinner,sun8i-a23-rsb";
582 clock-frequency = <3000000>;
584 pinctrl-names = "default";
585 pinctrl-0 = <&r_rsb_pins>;
587 #address-cells = <1>;
588 #size-cells = <0>;