Lines Matching +full:0 +full:x05070400
22 #size-cells = <0>;
24 cpu0: cpu@0 {
27 reg = <0>;
72 #clock-cells = <0>;
114 reg = <0x1000000 0x400000>;
118 ranges = <0 0x1000000 0x400000>;
120 display_clocks: clock@0 {
122 reg = <0x0 0x10000>;
133 compatible = "allwinner,sun50i-h6-de3-mixer-0";
134 reg = <0x100000 0x100000>;
140 iommus = <&iommu 0>;
144 #size-cells = <0>;
159 reg = <0x01c00000 0x1000>;
169 reg = <0x01c0e000 0x2000>;
182 reg = <0x01800000 0x4000>;
196 reg = <0x01904000 0x1000>;
206 reg = <0x03000000 0x1000>;
213 reg = <0x00028000 0x1e000>;
216 ranges = <0 0x00028000 0x1e000>;
218 de2_sram: sram-section@0 {
221 reg = <0x0000 0x1e000>;
227 reg = <0x01a00000 0x200000>;
230 ranges = <0 0x01a00000 0x200000>;
232 ve_sram: sram-section@0 {
235 reg = <0x000000 0x200000>;
242 reg = <0x03001000 0x1000>;
251 reg = <0x03002000 0x1000>;
264 reg = <0x03003000 0x1000>;
273 reg = <0x03006000 0x400>;
278 reg = <0x14 0x8>;
282 reg = <0x1c 0x4>;
289 reg = <0x03009000 0xa0>;
298 reg = <0x030090a0 0x20>;
307 reg = <0x0300a000 0x400>;
317 reg = <0x0300b000 0x400>;
432 reg = <0x03021000 0x1000>,
433 <0x03022000 0x2000>,
434 <0x03024000 0x2000>,
435 <0x03026000 0x2000>;
443 reg = <0x030f0000 0x10000>;
453 reg = <0x04020000 0x1000>;
460 pinctrl-0 = <&mmc0_pins>;
464 #size-cells = <0>;
470 reg = <0x04021000 0x1000>;
477 pinctrl-0 = <&mmc1_pins>;
481 #size-cells = <0>;
487 reg = <0x04022000 0x1000>;
494 pinctrl-0 = <&mmc2_pins>;
498 #size-cells = <0>;
503 reg = <0x05000000 0x400>;
504 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
514 reg = <0x05000400 0x400>;
525 reg = <0x05000800 0x400>;
536 reg = <0x05000c00 0x400>;
548 reg = <0x05002000 0x400>;
553 pinctrl-0 = <&i2c0_pins>;
556 #size-cells = <0>;
562 reg = <0x05002400 0x400>;
567 pinctrl-0 = <&i2c1_pins>;
570 #size-cells = <0>;
576 reg = <0x05002800 0x400>;
581 pinctrl-0 = <&i2c2_pins>;
584 #size-cells = <0>;
590 reg = <0x05010000 0x1000>;
599 #size-cells = <0>;
605 reg = <0x05011000 0x1000>;
614 #size-cells = <0>;
621 reg = <0x05020000 0x10000>;
633 #size-cells = <0>;
638 #sound-dai-cells = <0>;
640 reg = <0x05091000 0x1000>;
651 #sound-dai-cells = <0>;
653 reg = <0x05093000 0x400>;
661 pinctrl-0 = <&spdif_tx_pin>;
668 reg = <0x05100000 0x0400>;
673 phys = <&usb2phy 0>;
675 extcon = <&usb2phy 0>;
681 reg = <0x05100400 0x24>,
682 <0x05101800 0x4>,
683 <0x05311800 0x4>;
701 reg = <0x05101000 0x100>;
708 phys = <&usb2phy 0>;
715 reg = <0x05101400 0x100>;
720 phys = <&usb2phy 0>;
727 reg = <0x05200000 0x10000>;
750 reg = <0x5210000 0x10000>;
753 #phy-cells = <0>;
759 reg = <0x05311000 0x100>;
773 reg = <0x05311400 0x100>;
785 reg = <0x06000000 0x10000>;
798 pinctrl-0 = <&hdmi_pins>;
803 #size-cells = <0>;
805 hdmi_in: port@0 {
806 reg = <0>;
821 reg = <0x06010000 0x10000>;
826 #phy-cells = <0>;
831 reg = <0x06510000 0x1000>;
842 #size-cells = <0>;
844 tcon_top_mixer0_in: port@0 {
846 #size-cells = <0>;
847 reg = <0>;
849 tcon_top_mixer0_in_mixer0: endpoint@0 {
850 reg = <0>;
857 #size-cells = <0>;
868 #size-cells = <0>;
871 tcon_top_hdmi_in_tcon_tv: endpoint@0 {
872 reg = <0>;
890 reg = <0x06515000 0x1000>;
901 #size-cells = <0>;
903 tcon_tv_in: port@0 {
904 reg = <0>;
913 #size-cells = <0>;
926 reg = <0x07000000 0x400>;
936 reg = <0x07010000 0x400>;
947 reg = <0x07020400 0x20>;
956 reg = <0x07021000 0x400>;
962 reg = <0x07022000 0x400>;
993 reg = <0x07040000 0x400>;
1000 pinctrl-0 = <&r_ir_rx_pin>;
1007 reg = <0x07081400 0x400>;
1012 pinctrl-0 = <&r_i2c_pins>;
1015 #size-cells = <0>;
1020 reg = <0x07083000 0x400>;
1026 pinctrl-0 = <&r_rsb_pins>;
1029 #size-cells = <0>;
1034 reg = <0x05070400 0x100>;
1047 polling-delay-passive = <0>;
1048 polling-delay = <0>;
1049 thermal-sensors = <&ths 0>;
1060 hysteresis = <0>;
1082 gpu_alert0: gpu-alert-0 {
1102 hysteresis = <0>;