Lines Matching +full:sun8i +full:- +full:h3 +full:- +full:spi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // based on the Allwinner H3 dtsi:
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <1>;
19 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
26 simplefb_lcd: framebuffer-lcd {
27 compatible = "allwinner,simple-framebuffer",
28 "simple-framebuffer";
29 allwinner,pipeline = "mixer0-lcd0";
35 simplefb_hdmi: framebuffer-hdmi {
36 compatible = "allwinner,simple-framebuffer",
37 "simple-framebuffer";
38 allwinner,pipeline = "mixer1-lcd1-hdmi";
46 #address-cells = <1>;
47 #size-cells = <0>;
50 compatible = "arm,cortex-a53";
53 enable-method = "psci";
54 next-level-cache = <&L2>;
56 clock-names = "cpu";
57 #cooling-cells = <2>;
61 compatible = "arm,cortex-a53";
64 enable-method = "psci";
65 next-level-cache = <&L2>;
67 clock-names = "cpu";
68 #cooling-cells = <2>;
72 compatible = "arm,cortex-a53";
75 enable-method = "psci";
76 next-level-cache = <&L2>;
78 clock-names = "cpu";
79 #cooling-cells = <2>;
83 compatible = "arm,cortex-a53";
86 enable-method = "psci";
87 next-level-cache = <&L2>;
89 clock-names = "cpu";
90 #cooling-cells = <2>;
93 L2: l2-cache {
95 cache-level = <2>;
99 de: display-engine {
100 compatible = "allwinner,sun50i-a64-display-engine";
106 gpu_opp_table: opp-table-gpu {
107 compatible = "operating-points-v2";
109 opp-120000000 {
110 opp-hz = /bits/ 64 <120000000>;
113 opp-312000000 {
114 opp-hz = /bits/ 64 <312000000>;
117 opp-432000000 {
118 opp-hz = /bits/ 64 <432000000>;
123 #clock-cells = <0>;
124 compatible = "fixed-clock";
125 clock-frequency = <24000000>;
126 clock-output-names = "osc24M";
130 #clock-cells = <0>;
131 compatible = "fixed-clock";
132 clock-frequency = <32768>;
133 clock-output-names = "ext-osc32k";
137 compatible = "arm,cortex-a53-pmu";
142 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
146 compatible = "arm,psci-0.2";
151 #address-cells = <1>;
152 #size-cells = <0>;
153 compatible = "simple-audio-card";
154 simple-audio-card,name = "sun50i-a64-audio";
155 simple-audio-card,aux-devs = <&codec_analog>;
156 simple-audio-card,routing =
163 simple-audio-card,dai-link@0 {
165 frame-master = <&link0_cpu>;
166 bitclock-master = <&link0_cpu>;
167 mclk-fs = <128>;
170 sound-dai = <&dai>;
174 sound-dai = <&codec 0>;
180 compatible = "arm,armv8-timer";
181 allwinner,erratum-unknown1;
182 arm,no-tick-in-suspend;
193 thermal-zones {
194 cpu_thermal: cpu0-thermal {
196 polling-delay-passive = <0>;
197 polling-delay = <0>;
198 thermal-sensors = <&ths 0>;
200 cooling-maps {
203 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
210 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
241 gpu0_thermal: gpu0-thermal {
243 polling-delay-passive = <0>;
244 polling-delay = <0>;
245 thermal-sensors = <&ths 1>;
248 gpu1_thermal: gpu1-thermal {
250 polling-delay-passive = <0>;
251 polling-delay = <0>;
252 thermal-sensors = <&ths 2>;
257 compatible = "simple-bus";
258 #address-cells = <1>;
259 #size-cells = <1>;
263 compatible = "allwinner,sun50i-a64-de2";
266 #address-cells = <1>;
267 #size-cells = <1>;
271 compatible = "allwinner,sun50i-a64-de2-clk";
275 clock-names = "bus",
278 #clock-cells = <1>;
279 #reset-cells = <1>;
283 compatible = "allwinner,sun50i-a64-de2-rotate",
284 "allwinner,sun8i-a83t-de2-rotate";
289 clock-names = "bus",
295 compatible = "allwinner,sun50i-a64-de2-mixer-0";
299 clock-names = "bus",
304 #address-cells = <1>;
305 #size-cells = <0>;
308 #address-cells = <1>;
309 #size-cells = <0>;
314 remote-endpoint = <&tcon0_in_mixer0>;
319 remote-endpoint = <&tcon1_in_mixer0>;
326 compatible = "allwinner,sun50i-a64-de2-mixer-1";
330 clock-names = "bus",
335 #address-cells = <1>;
336 #size-cells = <0>;
339 #address-cells = <1>;
340 #size-cells = <0>;
345 remote-endpoint = <&tcon0_in_mixer1>;
350 remote-endpoint = <&tcon1_in_mixer1>;
358 compatible = "allwinner,sun50i-a64-system-control";
360 #address-cells = <1>;
361 #size-cells = <1>;
365 compatible = "mmio-sram";
367 #address-cells = <1>;
368 #size-cells = <1>;
371 de2_sram: sram-section@0 {
372 compatible = "allwinner,sun50i-a64-sram-c";
378 compatible = "mmio-sram";
380 #address-cells = <1>;
381 #size-cells = <1>;
384 ve_sram: sram-section@0 {
385 compatible = "allwinner,sun50i-a64-sram-c1",
386 "allwinner,sun4i-a10-sram-c1";
392 dma: dma-controller@1c02000 {
393 compatible = "allwinner,sun50i-a64-dma";
397 dma-channels = <8>;
398 dma-requests = <27>;
400 #dma-cells = <1>;
403 tcon0: lcd-controller@1c0c000 {
404 compatible = "allwinner,sun50i-a64-tcon-lcd",
405 "allwinner,sun8i-a83t-tcon-lcd";
409 clock-names = "ahb", "tcon-ch0";
410 clock-output-names = "tcon-pixel-clock";
411 #clock-cells = <0>;
413 reset-names = "lcd", "lvds";
416 #address-cells = <1>;
417 #size-cells = <0>;
420 #address-cells = <1>;
421 #size-cells = <0>;
426 remote-endpoint = <&mixer0_out_tcon0>;
431 remote-endpoint = <&mixer1_out_tcon0>;
436 #address-cells = <1>;
437 #size-cells = <0>;
442 remote-endpoint = <&dsi_in_tcon0>;
443 allwinner,tcon-channel = <1>;
449 tcon1: lcd-controller@1c0d000 {
450 compatible = "allwinner,sun50i-a64-tcon-tv",
451 "allwinner,sun8i-a83t-tcon-tv";
455 clock-names = "ahb", "tcon-ch1";
457 reset-names = "lcd";
460 #address-cells = <1>;
461 #size-cells = <0>;
464 #address-cells = <1>;
465 #size-cells = <0>;
470 remote-endpoint = <&mixer0_out_tcon1>;
475 remote-endpoint = <&mixer1_out_tcon1>;
480 #address-cells = <1>;
481 #size-cells = <0>;
486 remote-endpoint = <&hdmi_in_tcon1>;
492 video-codec@1c0e000 {
493 compatible = "allwinner,sun50i-a64-video-engine";
497 clock-names = "ahb", "mod", "ram";
504 compatible = "allwinner,sun50i-a64-mmc";
507 clock-names = "ahb", "mmc";
509 reset-names = "ahb";
511 max-frequency = <150000000>;
513 #address-cells = <1>;
514 #size-cells = <0>;
518 compatible = "allwinner,sun50i-a64-mmc";
521 clock-names = "ahb", "mmc";
523 reset-names = "ahb";
525 max-frequency = <150000000>;
527 #address-cells = <1>;
528 #size-cells = <0>;
532 compatible = "allwinner,sun50i-a64-emmc";
535 clock-names = "ahb", "mmc";
537 reset-names = "ahb";
539 max-frequency = <150000000>;
541 #address-cells = <1>;
542 #size-cells = <0>;
546 compatible = "allwinner,sun50i-a64-sid";
548 #address-cells = <1>;
549 #size-cells = <1>;
551 ths_calibration: thermal-sensor-calibration@34 {
557 compatible = "allwinner,sun50i-a64-crypto";
561 clock-names = "bus", "mod";
566 compatible = "allwinner,sun50i-a64-msgbox",
567 "allwinner,sun6i-a31-msgbox";
572 #mbox-cells = <1>;
576 compatible = "allwinner,sun8i-a33-musb";
581 interrupt-names = "mc";
583 phy-names = "usb";
590 compatible = "allwinner,sun50i-a64-usb-phy";
594 reg-names = "phy_ctrl",
599 clock-names = "usb0_phy",
603 reset-names = "usb0_reset",
606 #phy-cells = <1>;
610 compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
619 phy-names = "usb";
624 compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
631 phy-names = "usb";
636 compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
645 phy-names = "usb";
650 compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
657 phy-names = "usb";
662 compatible = "allwinner,sun50i-a64-ccu";
665 clock-names = "hosc", "losc";
666 #clock-cells = <1>;
667 #reset-cells = <1>;
671 compatible = "allwinner,sun50i-a64-pinctrl";
673 interrupt-parent = <&r_intc>;
679 clock-names = "apb", "hosc", "losc";
680 gpio-controller;
681 #gpio-cells = <3>;
682 interrupt-controller;
683 #interrupt-cells = <3>;
685 /omit-if-no-ref/
686 aif2_pins: aif2-pins {
691 /omit-if-no-ref/
692 aif3_pins: aif3-pins {
697 csi_pins: csi-pins {
703 /omit-if-no-ref/
704 csi_mclk_pin: csi-mclk-pin {
709 i2c0_pins: i2c0-pins {
714 i2c1_pins: i2c1-pins {
719 i2c2_pins: i2c2-pins {
724 /omit-if-no-ref/
725 lcd_rgb666_pins: lcd-rgb666-pins {
734 mmc0_pins: mmc0-pins {
738 drive-strength = <30>;
739 bias-pull-up;
742 mmc1_pins: mmc1-pins {
746 drive-strength = <30>;
747 bias-pull-up;
750 mmc2_pins: mmc2-pins {
755 drive-strength = <30>;
756 bias-pull-up;
759 mmc2_ds_pin: mmc2-ds-pin {
762 drive-strength = <30>;
763 bias-pull-up;
766 pwm_pin: pwm-pin {
771 rmii_pins: rmii-pins {
775 drive-strength = <40>;
778 rgmii_pins: rgmii-pins {
783 drive-strength = <40>;
786 spdif_tx_pin: spdif-tx-pin {
791 spi0_pins: spi0-pins {
796 spi1_pins: spi1-pins {
801 uart0_pb_pins: uart0-pb-pins {
806 uart1_pins: uart1-pins {
811 uart1_rts_cts_pins: uart1-rts-cts-pins {
816 uart2_pins: uart2-pins {
821 uart3_pins: uart3-pins {
826 uart4_pins: uart4-pins {
831 uart4_rts_cts_pins: uart4-rts-cts-pins {
838 compatible = "allwinner,sun50i-a64-timer",
839 "allwinner,sun8i-a23-timer";
847 compatible = "allwinner,sun50i-a64-wdt",
848 "allwinner,sun6i-a31-wdt";
855 #sound-dai-cells = <0>;
856 compatible = "allwinner,sun50i-a64-spdif",
857 "allwinner,sun8i-h3-spdif";
862 clock-names = "apb", "spdif";
864 dma-names = "tx";
865 pinctrl-names = "default";
866 pinctrl-0 = <&spdif_tx_pin>;
871 compatible = "allwinner,sun50i-a64-lradc",
872 "allwinner,sun8i-a83t-r-lradc";
874 interrupt-parent = <&r_intc>;
880 #sound-dai-cells = <0>;
881 compatible = "allwinner,sun50i-a64-i2s",
882 "allwinner,sun8i-h3-i2s";
886 clock-names = "apb", "mod";
888 dma-names = "rx", "tx";
894 #sound-dai-cells = <0>;
895 compatible = "allwinner,sun50i-a64-i2s",
896 "allwinner,sun8i-h3-i2s";
900 clock-names = "apb", "mod";
902 dma-names = "rx", "tx";
908 #sound-dai-cells = <0>;
909 compatible = "allwinner,sun50i-a64-i2s",
910 "allwinner,sun8i-h3-i2s";
914 clock-names = "apb", "mod";
916 dma-names = "rx", "tx";
922 #sound-dai-cells = <0>;
923 compatible = "allwinner,sun50i-a64-codec-i2s";
927 clock-names = "apb", "mod";
930 dma-names = "rx", "tx";
935 #sound-dai-cells = <1>;
936 compatible = "allwinner,sun50i-a64-codec",
937 "allwinner,sun8i-a33-codec";
941 clock-names = "bus", "mod";
945 ths: thermal-sensor@1c25000 {
946 compatible = "allwinner,sun50i-a64-ths";
949 clock-names = "bus", "mod";
952 nvmem-cells = <&ths_calibration>;
953 nvmem-cell-names = "calibration";
954 #thermal-sensor-cells = <1>;
958 compatible = "snps,dw-apb-uart";
961 reg-shift = <2>;
962 reg-io-width = <4>;
969 compatible = "snps,dw-apb-uart";
972 reg-shift = <2>;
973 reg-io-width = <4>;
980 compatible = "snps,dw-apb-uart";
983 reg-shift = <2>;
984 reg-io-width = <4>;
991 compatible = "snps,dw-apb-uart";
994 reg-shift = <2>;
995 reg-io-width = <4>;
1002 compatible = "snps,dw-apb-uart";
1005 reg-shift = <2>;
1006 reg-io-width = <4>;
1013 compatible = "allwinner,sun6i-a31-i2c";
1018 pinctrl-names = "default";
1019 pinctrl-0 = <&i2c0_pins>;
1021 #address-cells = <1>;
1022 #size-cells = <0>;
1026 compatible = "allwinner,sun6i-a31-i2c";
1031 pinctrl-names = "default";
1032 pinctrl-0 = <&i2c1_pins>;
1034 #address-cells = <1>;
1035 #size-cells = <0>;
1039 compatible = "allwinner,sun6i-a31-i2c";
1044 pinctrl-names = "default";
1045 pinctrl-0 = <&i2c2_pins>;
1047 #address-cells = <1>;
1048 #size-cells = <0>;
1051 spi0: spi@1c68000 {
1052 compatible = "allwinner,sun8i-h3-spi";
1056 clock-names = "ahb", "mod";
1058 dma-names = "rx", "tx";
1059 pinctrl-names = "default";
1060 pinctrl-0 = <&spi0_pins>;
1063 num-cs = <1>;
1064 #address-cells = <1>;
1065 #size-cells = <0>;
1068 spi1: spi@1c69000 {
1069 compatible = "allwinner,sun8i-h3-spi";
1073 clock-names = "ahb", "mod";
1075 dma-names = "rx", "tx";
1076 pinctrl-names = "default";
1077 pinctrl-0 = <&spi1_pins>;
1080 num-cs = <1>;
1081 #address-cells = <1>;
1082 #size-cells = <0>;
1086 compatible = "allwinner,sun50i-a64-emac";
1090 interrupt-names = "macirq";
1092 reset-names = "stmmaceth";
1094 clock-names = "stmmaceth";
1098 compatible = "snps,dwmac-mdio";
1099 #address-cells = <1>;
1100 #size-cells = <0>;
1105 compatible = "allwinner,sun50i-a64-mali", "arm,mali-400";
1114 interrupt-names = "gp",
1122 clock-names = "bus", "core";
1124 operating-points-v2 = <&gpu_opp_table>;
1127 gic: interrupt-controller@1c81000 {
1128 compatible = "arm,gic-400";
1134 interrupt-controller;
1135 #interrupt-cells = <3>;
1139 compatible = "allwinner,sun50i-a64-pwm",
1140 "allwinner,sun5i-a13-pwm";
1143 pinctrl-names = "default";
1144 pinctrl-0 = <&pwm_pin>;
1145 #pwm-cells = <3>;
1149 mbus: dram-controller@1c62000 {
1150 compatible = "allwinner,sun50i-a64-mbus";
1153 reg-names = "mbus", "dram";
1157 clock-names = "mbus", "dram", "bus";
1159 #address-cells = <1>;
1160 #size-cells = <1>;
1161 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
1162 #interconnect-cells = <1>;
1166 compatible = "allwinner,sun50i-a64-csi";
1172 clock-names = "bus", "mod", "ram";
1174 pinctrl-names = "default";
1175 pinctrl-0 = <&csi_pins>;
1180 compatible = "allwinner,sun50i-a64-mipi-dsi";
1186 phy-names = "dphy";
1188 #address-cells = <1>;
1189 #size-cells = <0>;
1193 remote-endpoint = <&tcon0_out_dsi>;
1198 dphy: d-phy@1ca1000 {
1199 compatible = "allwinner,sun50i-a64-mipi-dphy",
1200 "allwinner,sun6i-a31-mipi-dphy";
1204 clock-names = "bus", "mod";
1207 #phy-cells = <0>;
1211 compatible = "allwinner,sun50i-a64-deinterlace",
1212 "allwinner,sun8i-h3-deinterlace";
1217 clock-names = "bus", "mod", "ram";
1221 interconnect-names = "dma-mem";
1225 compatible = "allwinner,sun50i-a64-dw-hdmi",
1226 "allwinner,sun8i-a83t-dw-hdmi";
1228 reg-io-width = <1>;
1232 clock-names = "iahb", "isfr", "tmds", "cec";
1234 reset-names = "ctrl";
1236 phy-names = "phy";
1240 #address-cells = <1>;
1241 #size-cells = <0>;
1247 remote-endpoint = <&tcon1_out_hdmi>;
1257 hdmi_phy: hdmi-phy@1ef0000 {
1258 compatible = "allwinner,sun50i-a64-hdmi-phy";
1262 clock-names = "bus", "mod", "pll-0";
1264 reset-names = "phy";
1265 #phy-cells = <0>;
1269 compatible = "allwinner,sun50i-a64-rtc",
1270 "allwinner,sun8i-h3-rtc";
1272 interrupt-parent = <&r_intc>;
1275 clock-output-names = "osc32k", "osc32k-out", "iosc";
1277 #clock-cells = <1>;
1280 r_intc: interrupt-controller@1f00c00 {
1281 compatible = "allwinner,sun50i-a64-r-intc",
1282 "allwinner,sun6i-a31-r-intc";
1283 interrupt-controller;
1284 #interrupt-cells = <3>;
1290 compatible = "allwinner,sun50i-a64-r-ccu";
1294 clock-names = "hosc", "losc", "iosc", "pll-periph";
1295 #clock-cells = <1>;
1296 #reset-cells = <1>;
1299 codec_analog: codec-analog@1f015c0 {
1300 compatible = "allwinner,sun50i-a64-codec-analog";
1306 compatible = "allwinner,sun50i-a64-i2c",
1307 "allwinner,sun6i-a31-i2c";
1313 #address-cells = <1>;
1314 #size-cells = <0>;
1318 compatible = "allwinner,sun50i-a64-ir",
1319 "allwinner,sun6i-a31-ir";
1322 clock-names = "apb", "ir";
1325 pinctrl-names = "default";
1326 pinctrl-0 = <&r_ir_rx_pin>;
1331 compatible = "allwinner,sun50i-a64-pwm",
1332 "allwinner,sun5i-a13-pwm";
1335 pinctrl-names = "default";
1336 pinctrl-0 = <&r_pwm_pin>;
1337 #pwm-cells = <3>;
1342 compatible = "allwinner,sun50i-a64-r-pinctrl";
1344 interrupt-parent = <&r_intc>;
1347 clock-names = "apb", "hosc", "losc";
1348 gpio-controller;
1349 #gpio-cells = <3>;
1350 interrupt-controller;
1351 #interrupt-cells = <3>;
1353 r_i2c_pl89_pins: r-i2c-pl89-pins {
1358 r_ir_rx_pin: r-ir-rx-pin {
1363 r_pwm_pin: r-pwm-pin {
1368 r_rsb_pins: r-rsb-pins {
1375 compatible = "allwinner,sun8i-a23-rsb";
1379 clock-frequency = <3000000>;
1381 pinctrl-names = "default";
1382 pinctrl-0 = <&r_rsb_pins>;
1384 #address-cells = <1>;
1385 #size-cells = <0>;