Lines Matching +full:0 +full:x01c68000
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
123 #clock-cells = <0>;
130 #clock-cells = <0>;
152 #size-cells = <0>;
163 simple-audio-card,dai-link@0 {
174 sound-dai = <&codec 0>;
196 polling-delay-passive = <0>;
197 polling-delay = <0>;
198 thermal-sensors = <&ths 0>;
243 polling-delay-passive = <0>;
244 polling-delay = <0>;
250 polling-delay-passive = <0>;
251 polling-delay = <0>;
264 reg = <0x1000000 0x400000>;
268 ranges = <0 0x1000000 0x400000>;
270 display_clocks: clock@0 {
272 reg = <0x0 0x10000>;
285 reg = <0x20000 0x10000>;
295 compatible = "allwinner,sun50i-a64-de2-mixer-0";
296 reg = <0x100000 0x100000>;
305 #size-cells = <0>;
309 #size-cells = <0>;
312 mixer0_out_tcon0: endpoint@0 {
313 reg = <0>;
327 reg = <0x200000 0x100000>;
336 #size-cells = <0>;
340 #size-cells = <0>;
343 mixer1_out_tcon0: endpoint@0 {
344 reg = <0>;
359 reg = <0x01c00000 0x1000>;
366 reg = <0x00018000 0x28000>;
369 ranges = <0 0x00018000 0x28000>;
371 de2_sram: sram-section@0 {
373 reg = <0x0000 0x28000>;
379 reg = <0x01d00000 0x40000>;
382 ranges = <0 0x01d00000 0x40000>;
384 ve_sram: sram-section@0 {
387 reg = <0x000000 0x40000>;
394 reg = <0x01c02000 0x1000>;
406 reg = <0x01c0c000 0x1000>;
411 #clock-cells = <0>;
417 #size-cells = <0>;
419 tcon0_in: port@0 {
421 #size-cells = <0>;
422 reg = <0>;
424 tcon0_in_mixer0: endpoint@0 {
425 reg = <0>;
437 #size-cells = <0>;
452 reg = <0x01c0d000 0x1000>;
461 #size-cells = <0>;
463 tcon1_in: port@0 {
465 #size-cells = <0>;
466 reg = <0>;
468 tcon1_in_mixer0: endpoint@0 {
469 reg = <0>;
481 #size-cells = <0>;
494 reg = <0x01c0e000 0x1000>;
505 reg = <0x01c0f000 0x1000>;
514 #size-cells = <0>;
519 reg = <0x01c10000 0x1000>;
528 #size-cells = <0>;
533 reg = <0x01c11000 0x1000>;
542 #size-cells = <0>;
547 reg = <0x1c14000 0x400>;
552 reg = <0x34 0x8>;
558 reg = <0x01c15000 0x1000>;
568 reg = <0x01c17000 0x1000>;
577 reg = <0x01c19000 0x0400>;
582 phys = <&usbphy 0>;
584 extcon = <&usbphy 0>;
591 reg = <0x01c19400 0x14>,
592 <0x01c1a800 0x4>,
593 <0x01c1b800 0x4>;
611 reg = <0x01c1a000 0x100>;
618 phys = <&usbphy 0>;
625 reg = <0x01c1a400 0x100>;
630 phys = <&usbphy 0>;
637 reg = <0x01c1b000 0x100>;
651 reg = <0x01c1b400 0x100>;
663 reg = <0x01c20000 0x400>;
672 reg = <0x01c20800 0x400>;
840 reg = <0x01c20c00 0xa0>;
849 reg = <0x01c20ca0 0x20>;
855 #sound-dai-cells = <0>;
858 reg = <0x01c21000 0x400>;
866 pinctrl-0 = <&spdif_tx_pin>;
873 reg = <0x01c21800 0x400>;
880 #sound-dai-cells = <0>;
883 reg = <0x01c22000 0x400>;
894 #sound-dai-cells = <0>;
897 reg = <0x01c22400 0x400>;
908 #sound-dai-cells = <0>;
911 reg = <0x01c22800 0x400>;
922 #sound-dai-cells = <0>;
924 reg = <0x01c22c00 0x200>;
938 reg = <0x01c22e00 0x600>;
947 reg = <0x01c25000 0x100>;
959 reg = <0x01c28000 0x400>;
960 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
970 reg = <0x01c28400 0x400>;
981 reg = <0x01c28800 0x400>;
992 reg = <0x01c28c00 0x400>;
1003 reg = <0x01c29000 0x400>;
1014 reg = <0x01c2ac00 0x400>;
1019 pinctrl-0 = <&i2c0_pins>;
1022 #size-cells = <0>;
1027 reg = <0x01c2b000 0x400>;
1032 pinctrl-0 = <&i2c1_pins>;
1035 #size-cells = <0>;
1040 reg = <0x01c2b400 0x400>;
1045 pinctrl-0 = <&i2c2_pins>;
1048 #size-cells = <0>;
1053 reg = <0x01c68000 0x1000>;
1060 pinctrl-0 = <&spi0_pins>;
1065 #size-cells = <0>;
1070 reg = <0x01c69000 0x1000>;
1077 pinctrl-0 = <&spi1_pins>;
1082 #size-cells = <0>;
1088 reg = <0x01c30000 0x10000>;
1100 #size-cells = <0>;
1106 reg = <0x01c40000 0x10000>;
1129 reg = <0x01c81000 0x1000>,
1130 <0x01c82000 0x2000>,
1131 <0x01c84000 0x2000>,
1132 <0x01c86000 0x2000>;
1141 reg = <0x01c21400 0x400>;
1144 pinctrl-0 = <&pwm_pin>;
1151 reg = <0x01c62000 0x1000>,
1152 <0x01c63000 0x1000>;
1161 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
1167 reg = <0x01cb0000 0x1000>;
1175 pinctrl-0 = <&csi_pins>;
1181 reg = <0x01ca0000 0x1000>;
1189 #size-cells = <0>;
1201 reg = <0x01ca1000 0x1000>;
1207 #phy-cells = <0>;
1213 reg = <0x01e00000 0x20000>;
1227 reg = <0x01ee0000 0x10000>;
1241 #size-cells = <0>;
1243 hdmi_in: port@0 {
1244 reg = <0>;
1259 reg = <0x01ef0000 0x10000>;
1262 clock-names = "bus", "mod", "pll-0";
1265 #phy-cells = <0>;
1271 reg = <0x01f00000 0x400>;
1285 reg = <0x01f00c00 0x400>;
1291 reg = <0x01f01400 0x100>;
1301 reg = <0x01f015c0 0x4>;
1308 reg = <0x01f02400 0x400>;
1314 #size-cells = <0>;
1320 reg = <0x01f02000 0x400>;
1326 pinctrl-0 = <&r_ir_rx_pin>;
1333 reg = <0x01f03800 0x400>;
1336 pinctrl-0 = <&r_pwm_pin>;
1343 reg = <0x01f02c00 0x400>;
1376 reg = <0x01f03400 0x400>;
1382 pinctrl-0 = <&r_rsb_pins>;
1385 #size-cells = <0>;