Lines Matching defs:rm
162 #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm)) argument
168 #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm) argument
169 #define ARM_ADDS_R(rd, rn, rm) _AL3_R(ARM_INST_ADDS, rd, rn, rm) argument
172 #define ARM_ADC_R(rd, rn, rm) _AL3_R(ARM_INST_ADC, rd, rn, rm) argument
175 #define ARM_AND_R(rd, rn, rm) _AL3_R(ARM_INST_AND, rd, rn, rm) argument
176 #define ARM_ANDS_R(rd, rn, rm) _AL3_R(ARM_INST_ANDS, rd, rn, rm) argument
179 #define ARM_BIC_R(rd, rn, rm) _AL3_R(ARM_INST_BIC, rd, rn, rm) argument
183 #define ARM_BX(rm) (ARM_INST_BX | (rm)) argument
184 #define ARM_BLX_R(rm) (ARM_INST_BLX_R | (rm)) argument
186 #define ARM_CMP_R(rn, rm) _AL3_R(ARM_INST_CMP, 0, rn, rm) argument
189 #define ARM_EOR_R(rd, rn, rm) _AL3_R(ARM_INST_EOR, rd, rn, rm) argument
192 #define ARM_LDR_R(rt, rn, rm) (ARM_INST_LDR_R | ARM_INST_LDST__U \ argument
195 #define ARM_LDR_R_SI(rt, rn, rm, type, imm) \ argument
199 #define ARM_LDRB_R(rt, rn, rm) (ARM_INST_LDRB_R | ARM_INST_LDST__U \ argument
202 #define ARM_LDRH_R(rt, rn, rm) (ARM_INST_LDRH_R | ARM_INST_LDST__U \ argument
209 #define ARM_LSL_R(rd, rn, rm) (_AL3_R(ARM_INST_LSL, rd, 0, rn) | (rm) << 8) argument
212 #define ARM_LSR_R(rd, rn, rm) (_AL3_R(ARM_INST_LSR, rd, 0, rn) | (rm) << 8) argument
214 #define ARM_ASR_R(rd, rn, rm) (_AL3_R(ARM_INST_ASR, rd, 0, rn) | (rm) << 8) argument
217 #define ARM_MOV_R(rd, rm) _AL3_R(ARM_INST_MOV, rd, 0, rm) argument
218 #define ARM_MOVS_R(rd, rm) _AL3_R(ARM_INST_MOVS, rd, 0, rm) argument
220 #define ARM_MOV_SR(rd, rm, type, rs) \ argument
222 #define ARM_MOV_SI(rd, rm, type, imm6) \ argument
231 #define ARM_MUL(rd, rm, rn) (ARM_INST_MUL | (rd) << 16 | (rm) << 8 | (rn)) argument
236 #define ARM_ORR_R(rd, rn, rm) _AL3_R(ARM_INST_ORR, rd, rn, rm) argument
238 #define ARM_ORR_SR(rd, rn, rm, type, rs) \ argument
240 #define ARM_ORRS_R(rd, rn, rm) _AL3_R(ARM_INST_ORRS, rd, rn, rm) argument
241 #define ARM_ORRS_SR(rd, rn, rm, type, rs) \ argument
243 #define ARM_ORR_SI(rd, rn, rm, type, imm6) \ argument
245 #define ARM_ORRS_SI(rd, rn, rm, type, imm6) \ argument
248 #define ARM_REV(rd, rm) (ARM_INST_REV | (rd) << 12 | (rm)) argument
249 #define ARM_REV16(rd, rm) (ARM_INST_REV16 | (rd) << 12 | (rm)) argument
255 #define ARM_SUB_R(rd, rn, rm) _AL3_R(ARM_INST_SUB, rd, rn, rm) argument
256 #define ARM_SUBS_R(rd, rn, rm) _AL3_R(ARM_INST_SUBS, rd, rn, rm) argument
257 #define ARM_RSB_R(rd, rn, rm) _AL3_R(ARM_INST_RSB, rd, rn, rm) argument
258 #define ARM_SBC_R(rd, rn, rm) _AL3_R(ARM_INST_SBC, rd, rn, rm) argument
259 #define ARM_SBCS_R(rd, rn, rm) _AL3_R(ARM_INST_SBCS, rd, rn, rm) argument
264 #define ARM_TST_R(rn, rm) _AL3_R(ARM_INST_TST, 0, rn, rm) argument
267 #define ARM_UDIV(rd, rn, rm) (ARM_INST_UDIV | (rd) << 16 | (rn) | (rm) << 8) argument
269 #define ARM_UMULL(rd_lo, rd_hi, rn, rm) (ARM_INST_UMULL | (rd_hi) << 16 \ argument
272 #define ARM_MLS(rd, rn, rm, ra) (ARM_INST_MLS | (rd) << 16 | (rn) | (rm) << 8 \ argument
274 #define ARM_UXTH(rd, rm) (ARM_INST_UXTH | (rd) << 12 | (rm)) argument